From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Abel Vesa <abel.vesa@linaro.org>, Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Mike Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: Re: [PATCH 8/9] dt-bindings: clock: Add SM8550 TCSR CC clock bindings
Date: Thu, 17 Nov 2022 10:11:41 +0100 [thread overview]
Message-ID: <a9c269cd-5939-7753-9d3e-3bb2e08ccb5b@linaro.org> (raw)
In-Reply-To: <20221116104716.2583320-9-abel.vesa@linaro.org>
On 16/11/2022 11:47, Abel Vesa wrote:
> Add bindings documentation for clock TCSR driver on SM8550.
All bindings should go as first patches in the series.
Subject: drop second, redundant "bindings".
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
> .../bindings/clock/qcom,tcsrcc-sm8550.yaml | 46 +++++++++++++++++++
> .../dt-bindings/clock/qcom,tcsrcc-sm8550.h | 18 ++++++++
> 2 files changed, 64 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/qcom,tcsrcc-sm8550.yaml
> create mode 100644 include/dt-bindings/clock/qcom,tcsrcc-sm8550.h
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,tcsrcc-sm8550.yaml b/Documentation/devicetree/bindings/clock/qcom,tcsrcc-sm8550.yaml
> new file mode 100644
> index 000000000000..7d7bacb23610
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,tcsrcc-sm8550.yaml
Filename matching compatible.
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,tcsrcc-sm8550.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm TCSR Clock Controller Binding for SM8550
Same issue as your GCC patch.
> +
> +maintainers:
> + - Bjorn Andersson <andersson@kernel.org>
> +
> +description: |
> + Qualcomm TCSR clock control module which supports the clocks,
> + resets and power domains on SM8550
Same issue as your GCC patch.
> +
> + See also:
> + - dt-bindings/clock/qcom,tcsrcc-sm8550.h
Same issue as your GCC patch.
> +
> +properties:
> + compatible:
> + const: qcom,sm8550-tcsrcc
> +
> + '#clock-cells':
> + const: 1
> +
> + '#reset-cells':
> + const: 1
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> +
> +unevaluatedProperties: false
additionalProperties: false instead
> +
> +examples:
> + - |
> + clock-controller@1fc0000 {
> + compatible = "qcom,sm8550-tcsrcc";
> + reg = <0x1fc0000 0x30000>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + };
> +
> +...
> diff --git a/include/dt-bindings/clock/qcom,tcsrcc-sm8550.h b/include/dt-bindings/clock/qcom,tcsrcc-sm8550.h
> new file mode 100644
> index 000000000000..eda360e84f0a
> --- /dev/null
> +++ b/include/dt-bindings/clock/qcom,tcsrcc-sm8550.h
Filename matching compatible.
> @@ -0,0 +1,18 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
Dual license.
> +/*
> + * Copyright (c) 2022, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2022, Linaro Limited
> + */
> +
> +#ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H
> +#define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H
> +
> +/* GCC clocks */
> +#define TCSR_PCIE_0_CLKREF_EN 0
> +#define TCSR_PCIE_1_CLKREF_EN 1
> +#define TCSR_UFS_CLKREF_EN 2
> +#define TCSR_UFS_PAD_CLKREF_EN 3
> +#define TCSR_USB2_CLKREF_EN 4
> +#define TCSR_USB3_CLKREF_EN 5
> +
> +#endif
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-11-17 9:11 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-16 10:47 [PATCH 0/9] clk: qcom: Add support for SM8550 Abel Vesa
2022-11-16 10:47 ` [PATCH 1/9] dt-bindings: clock: Add SM8550 GCC clock bindings Abel Vesa
2022-11-17 9:08 ` Krzysztof Kozlowski
2022-11-17 9:40 ` Abel Vesa
2022-11-17 10:27 ` Krzysztof Kozlowski
2022-11-16 10:47 ` [PATCH 2/9] clk: qcom: gdsc: Add configurable poll timeout Abel Vesa
2022-11-16 11:19 ` Konrad Dybcio
2022-11-17 8:05 ` Abel Vesa
2022-11-17 9:23 ` Konrad Dybcio
2022-11-16 10:47 ` [PATCH 3/9] clk: qcom: Add LUCID_OLE PLL type for SM8550 Abel Vesa
2022-11-16 11:23 ` Konrad Dybcio
2022-11-16 10:47 ` [PATCH 4/9] clk: qcom: Add clock driver " Abel Vesa
2022-11-16 10:47 ` [PATCH 5/9] dt-bindings: clock: Add RPMHCC bindings " Abel Vesa
2022-11-17 9:09 ` Krzysztof Kozlowski
2022-11-17 9:41 ` Abel Vesa
2022-11-16 10:47 ` [PATCH 6/9] dt-bindings: clock: qcom,rpmh: Add CXO PAD clock IDs Abel Vesa
2022-11-17 9:09 ` Krzysztof Kozlowski
2022-11-16 10:47 ` [PATCH 7/9] clk: qcom: rpmh: Add support for SM8550 rpmh clocks Abel Vesa
2022-11-16 11:27 ` Konrad Dybcio
2022-11-17 8:10 ` Abel Vesa
2022-11-16 10:47 ` [PATCH 8/9] dt-bindings: clock: Add SM8550 TCSR CC clock bindings Abel Vesa
2022-11-17 9:11 ` Krzysztof Kozlowski [this message]
2022-11-16 10:47 ` [PATCH 9/9] clk: qcom: Add TCSR clock driver for SM8550 Abel Vesa
2022-11-16 11:29 ` Konrad Dybcio
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