From: Johan Hovold <johan@kernel.org>
To: Qiang Yu <quic_qianyu@quicinc.com>
Cc: Wenbin Yao <quic_wenbyao@quicinc.com>,
catalin.marinas@arm.com, will@kernel.org,
linux-arm-kernel@lists.infradead.org, andersson@kernel.org,
konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
vkoul@kernel.org, kishon@kernel.org, sfr@canb.auug.org.au,
linux-phy@lists.infradead.org, krishna.chundru@oss.qualcomm.com,
quic_vbadigan@quicinc.com, quic_mrana@quicinc.com,
quic_cang@quicinc.com, Johan Hovold <johan+linaro@kernel.org>,
Abel Vesa <abel.vesa@linaro.org>
Subject: Re: [PATCH v3 5/5] phy: qcom: qmp-pcie: add x1e80100 qref supplies
Date: Thu, 8 May 2025 11:45:16 +0200 [thread overview]
Message-ID: <aBx9LB_qQIvA0bj8@hovoldconsulting.com> (raw)
In-Reply-To: <5fd4abe7-3621-4119-9482-de823b247b0d@quicinc.com>
On Thu, May 08, 2025 at 04:50:30PM +0800, Qiang Yu wrote:
>
> On 5/8/2025 4:20 PM, Johan Hovold wrote:
> > On Thu, May 08, 2025 at 04:15:14PM +0800, Wenbin Yao wrote:
> >> From: Qiang Yu <quic_qianyu@quicinc.com>
> >>
> >> All PCIe PHYs on the X1E80100 SOC require the vdda-qref, which feeds QREF
> >> clocks provided by the TCSR device.
> > This still looks wrong and you never replied to why these supplies
> > shouldn't be handled by the tcsr clock driver that supplies these
> > clocks:
> >
> > https://lore.kernel.org/lkml/aBHUmXx6N72_sCH9@hovoldconsulting.com/
> Sorry, I thought Konrad had convinced you.
IIRC, he just said you guys were told to add the QREF supply to the PHY.
That's not an argument.
> If the TCSR driver manages these supplies, would it be possible for tscr
> driver to recognize when it needs to turn vdda-qref on or off for a
> specific PCIe port?
Sure, just add a lookup table to the driver and enable the required
supplies when a ref clock is enabled.
As I mentioned in the other thread, the T14s has the following QREF
supplies:
VDD_A_QREFS_1P2_A
VDD_A_QREFS_1P2_B
VDD_A_QREFS_0P875_A
VDD_A_QREFS_0P875_B
VDD_A_QREFS_0P875_0
VDD_A_QREFS_0P875_2
VDD_A_QREFS_0P875_3
and it's not clear how these maps to the various consumer ref clocks,
including the PCIe ones:
#define TCSR_PCIE_2L_4_CLKREF_EN
#define TCSR_PCIE_2L_5_CLKREF_EN
#define TCSR_PCIE_8L_CLKREF_EN
#define TCSR_PCIE_4L_CLKREF_EN
That mapping can be done by the TCSR clock driver (which would also take
care of the 1.2 V supplies).
Johan
next prev parent reply other threads:[~2025-05-08 9:45 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-08 8:15 [PATCH v3 0/5] arm64: qcom: x1e80100-qcp: Add power supply and sideband signals for PCIe RC Wenbin Yao
2025-05-08 8:15 ` [PATCH v3 1/5] arm64: Kconfig: enable PCI Power Control Slot driver for QCOM Wenbin Yao
2025-05-08 8:15 ` [PATCH v3 2/5] arm64: dts: qcom: x1e80100: add bus topology for PCIe domain 3 Wenbin Yao
2025-05-31 19:26 ` Konrad Dybcio
2025-05-08 8:15 ` [PATCH v3 3/5] arm64: dts: qcom: x1e80100-qcp: enable pcie3 x8 slot for X1E80100-QCP Wenbin Yao
2025-05-08 8:15 ` [PATCH v3 4/5] arm64: dts: qcom: x1e80100-qcp: Add qref supply for PCIe PHYs Wenbin Yao
2025-05-08 8:15 ` [PATCH v3 5/5] phy: qcom: qmp-pcie: add x1e80100 qref supplies Wenbin Yao
2025-05-08 8:20 ` Johan Hovold
2025-05-08 8:50 ` Qiang Yu
2025-05-08 9:45 ` Johan Hovold [this message]
2025-05-22 20:03 ` Konrad Dybcio
2025-05-26 13:47 ` Johan Hovold
2025-05-27 10:50 ` Konrad Dybcio
2025-06-04 14:59 ` Johan Hovold
2025-05-09 7:17 ` [PATCH v3 0/5] arm64: qcom: x1e80100-qcp: Add power supply and sideband signals for PCIe RC Qiang Yu
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