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Fri, 06 Jun 2025 08:33:02 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 5568X107019131 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 6 Jun 2025 08:33:01 GMT Received: from hu-wasimn-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 6 Jun 2025 01:32:54 -0700 Date: Fri, 6 Jun 2025 14:02:50 +0530 From: Wasim Nazir To: Dmitry Baryshkov CC: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , , , Pratyush Brahma , Prakash Gupta Subject: Re: [PATCH v9 2/4] arm64: dts: qcom: iq9: Introduce new memory map for qcs9100/qcs9075 Message-ID: References: <20250530092850.631831-1-quic_wasimn@quicinc.com> <20250530092850.631831-3-quic_wasimn@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: zgZp3PWVoq8iKPL3K4ByqNG-_DC-rBzx X-Authority-Analysis: v=2.4 cv=N8QpF39B c=1 sm=1 tr=0 ts=6842a7be cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=kj9zAlcOel0A:10 a=6IFa9wvqVegA:10 a=VwQbUJbxAAAA:8 a=COk6AnOGAAAA:8 a=YzUi6L5IsME7Xw4Q_eYA:9 a=CjuIK1q_8ugA:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNjA2MDA3OCBTYWx0ZWRfX0BSiBwDhf80o nn86y8LkCsZtd9PJIftHtvhWGqL7o5eVjlR1/Eq4ewL3dfK9INuU2bA4RzIu0D9ofMUhftecBwl xR7f+34gmQhs1FFwEoImdYq0MXHGv67MwmoYgV884oW0FYqq9P81j8hsouvlFDwsTKeYqcT3Soj frdpRjPm/u8fE10rkeQmXYLttWKq8WnJC9fO0fW5G8uyuCtq8TVQ3lbLWW2w3VSfFEiQc2bXG4U turh/IGPYlRly+6V9GJL0Vs3vUOvFFW6Apa7Z9hXX2jo4+aBeJeYOlu4/54BCJ0qssABZHQM0uh OrlJ+cZNreYWBtdl+oY2ufN/SQD1Zg/eG0aSH0NxmKjCmXLJu1e0M/OqGkE/P5HDQaePmtcpAj+ VQogTeb3yfO5LJgQOe5aXB3kIiQvfmBKOiOuNSh89oe1n1hHm7fp7NA6YOyoEQdrBN2i7CdY X-Proofpoint-GUID: zgZp3PWVoq8iKPL3K4ByqNG-_DC-rBzx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-06-06_02,2025-06-05_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 malwarescore=0 suspectscore=0 bulkscore=0 mlxscore=0 spamscore=0 priorityscore=1501 lowpriorityscore=0 clxscore=1015 impostorscore=0 mlxlogscore=999 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2506060078 On Wed, Jun 04, 2025 at 09:54:38PM +0530, Wasim Nazir wrote: > On Wed, Jun 04, 2025 at 04:21:46PM +0300, Dmitry Baryshkov wrote: > > On Wed, Jun 04, 2025 at 03:05:55PM +0530, Wasim Nazir wrote: > > > On Mon, Jun 02, 2025 at 10:41:39AM -0500, Bjorn Andersson wrote: > > > > On Fri, May 30, 2025 at 02:58:45PM +0530, Wasim Nazir wrote: > > > > > From: Pratyush Brahma > > > > > > > > > > SA8775P has a memory map which caters to the auto specific requirements. > > > > > > > > I thought SA8775P was the IoT platform and SA8255P was the automotive > > > > one. Has this changed? > > > > > > Both SA8775P & SA8255P is for auto but former one is non-SCMI based while > > > the later one is SCMI based chip. > > > > > > Only IQ9 series of chips (QCS9100 & QCS9075) are for IOT. > > > > > > > > > > > > QCS9100 & QCS9075 are its IOT variants (with marketing name as IQ9) which > > > > > inherit the memory map of SA8775P require a slightly different memory > > > > > map as compared to SA8775P auto parts. > > > > > This new memory map is applicable for all the IoT boards which inherit > > > > > the initial SA8775P memory map. This is not applicable for non-IoT > > > > > > > > Is there are platform out there that actually uses the "initial SA8775P > > > > memory map"? > > > > > > Yes currently sa8775p-ride and sa8775p-ride-r3 are using initial memory > > > map. > > > > > > > > > > > > boards. > > > > > > > > > > Some new carveouts (viz. gunyah_md and a few pil dtb carveouts) have been > > > > > introduced as part of firmware updates for IoT. The size and base address > > > > > have been updated for video PIL carveout compared to SA8775P since it is > > > > > being brought up for the first time on IoT boards. The base addresses > > > > > of the rest of the PIL carveouts have been updated to accommodate the > > > > > change in size of video since PIL regions are relocatable and their > > > > > functionality is not impacted due to this change. The size of camera > > > > > pil has also been increased without breaking any feature. > > > > > > > > > > The size of trusted apps carveout has also been reduced since it is > > > > > sufficient to meet IoT requirements. Also, audio_mdf_mem & tz_ffi_mem > > > > > carveout and its corresponding scm reference has been removed as these > > > > > are not required for IoT parts. > > > > > > > > > > Incorporate these changes in the updated memory map. > > > > > > > > > > Signed-off-by: Pratyush Brahma > > > > > Signed-off-by: Prakash Gupta > > > > > Signed-off-by: Wasim Nazir > > > > > --- > > > > > .../boot/dts/qcom/iq9-reserved-memory.dtsi | 113 ++++++++++++++++++ > > > > > 1 file changed, 113 insertions(+) > > > > > create mode 100644 arch/arm64/boot/dts/qcom/iq9-reserved-memory.dtsi > > > > > > > > > > diff --git a/arch/arm64/boot/dts/qcom/iq9-reserved-memory.dtsi b/arch/arm64/boot/dts/qcom/iq9-reserved-memory.dtsi > > > > > new file mode 100644 > > > > > index 000000000000..ff2600eb5e3d > > > > > --- /dev/null > > > > > +++ b/arch/arm64/boot/dts/qcom/iq9-reserved-memory.dtsi > > > > > > > > The naming convention is -.dtsi and I don't see any > > > > other uses of the "iq9" naming. > > > > > > As this new memory map is common for IQ9 series of SoC (QCS9100 & > > > QCS9075), so we have used its common name. > > > > IQ9 name is not known or visible outside of this commit. > > Are you referring to add the same in cover-letter? > > > > > > Once the DT structure for QCS9100 is refactored, we would update this > > > common file there. > > > > Can you refactor it first? > > This refactoring involves changes in all the ride/ride-r3 boards which > are based on sa8775p & qcs9100. Even though we had sent v0[1] but we still > need to conclude on the final structure. Since, ethernet is broken in upstream, > we are working on its fix before sending another series. > > Hence, we want to proceed for iq9075-evk for now and once qcs9100 is > finalized, we can use the memory-map there. > > But to avoid this dependency and to proceed with iq9075-evk alone, > I can rename it to qcs9075-reserved-memory.dtsi. > > Let me know if that works here. > > [1] https://lore.kernel.org/all/20250507065116.353114-1-quic_wasimn@quicinc.com/ Hi Dmitry, Shall I proceed with qcs9075-reserved-memory.dtsi or do you have any other suggestion that we should discuss? Aparently, this series is for qcs9075 only so using exact (not common) name also aligns the naming format. > > > > > > > > > > > > > > -- > > With best wishes > > Dmitry > > Regards, > Wasim -- Regards, Wasim