[PATCH 0/7] Camera I2C (CCI) enablement on MSM8953 and Fairphone 3

[PATCH 0/7] Camera I2C (CCI) enablement on MSM8953 and Fairphone 3

[Luca Weiss]

Add the compatibles and config for CCI on MSM8953, then enable these I2C
busses on Fairphone 3 and configure the EEPROM found with one of the
camera modules.

Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
---
Luca Weiss (7):
      dt-bindings: i2c: qcom-cci: Document msm8953 compatible
      i2c: qcom-cci: Add msm8953 compatible
      dt-bindings: eeprom: at24: Add compatible for Belling BL24S64
      arm64: dts: qcom: msm8953: Re-sort tlmm pinctrl states
      arm64: dts: qcom: msm8953: Add CCI nodes
      arm64: dts: qcom: sdm632-fairphone-fp3: Add camera fixed regulators
      arm64: dts: qcom: sdm632-fairphone-fp3: Enable CCI and add EEPROM

 Documentation/devicetree/bindings/eeprom/at24.yaml |   1 +
 .../devicetree/bindings/i2c/qcom,i2c-cci.yaml      |   2 +
 arch/arm64/boot/dts/qcom/msm8953.dtsi              | 496 ++++++++++++---------
 arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts  |  57 +++
 drivers/i2c/busses/i2c-qcom-cci.c                  |  46 ++
 5 files changed, 382 insertions(+), 220 deletions(-)
---
base-commit: 1ad00588bc181aad8d76d86420d03042bc7e9acf
change-id: 20250808-msm8953-cci-587596df83da

Best regards,
-- 
Luca Weiss <luca@lucaweiss.eu>

[PATCH 1/7] dt-bindings: i2c: qcom-cci: Document msm8953 compatible

[Luca Weiss]

Add the msm8953 CCI device string compatible.

Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
---
 Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
index 73144473b9b24e574bfc6bd7d8908f2f3895e087..be6cebc4ee054d3100e5c4c676f1a0c4fd8d2e1e 100644
--- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
+++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
@@ -15,6 +15,7 @@ properties:
     oneOf:
       - enum:
           - qcom,msm8226-cci
+          - qcom,msm8953-cci
           - qcom,msm8974-cci
           - qcom,msm8996-cci
 
@@ -128,6 +129,7 @@ allOf:
                 enum:
                   - qcom,msm8916-cci
 
+            - const: qcom,msm8953-cci
             - const: qcom,msm8996-cci
     then:
       properties:

-- 
2.50.1

Re: [PATCH 1/7] dt-bindings: i2c: qcom-cci: Document msm8953 compatible

[Rob Herring]

On Sun, Aug 10, 2025 at 05:37:52PM +0200, Luca Weiss wrote:
> Add the msm8953 CCI device string compatible.
> 
> Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
> ---
>  Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
> index 73144473b9b24e574bfc6bd7d8908f2f3895e087..be6cebc4ee054d3100e5c4c676f1a0c4fd8d2e1e 100644
> --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
> +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
> @@ -15,6 +15,7 @@ properties:
>      oneOf:
>        - enum:
>            - qcom,msm8226-cci
> +          - qcom,msm8953-cci
>            - qcom,msm8974-cci
>            - qcom,msm8996-cci
>  
> @@ -128,6 +129,7 @@ allOf:
>                  enum:
>                    - qcom,msm8916-cci
>  
> +            - const: qcom,msm8953-cci

This should be added to the enum above.

>              - const: qcom,msm8996-cci
>      then:
>        properties:
> 
> -- 
> 2.50.1
> 

Re: [PATCH 1/7] dt-bindings: i2c: qcom-cci: Document msm8953 compatible

[Luca Weiss]

On 18-08-2025 5:37 p.m., Rob Herring wrote:
> On Sun, Aug 10, 2025 at 05:37:52PM +0200, Luca Weiss wrote:
>> Add the msm8953 CCI device string compatible.
>>
>> Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
>> ---
>>   Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
>> index 73144473b9b24e574bfc6bd7d8908f2f3895e087..be6cebc4ee054d3100e5c4c676f1a0c4fd8d2e1e 100644
>> --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
>> +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
>> @@ -15,6 +15,7 @@ properties:
>>       oneOf:
>>         - enum:
>>             - qcom,msm8226-cci
>> +          - qcom,msm8953-cci
>>             - qcom,msm8974-cci
>>             - qcom,msm8996-cci
>>   
>> @@ -128,6 +129,7 @@ allOf:
>>                   enum:
>>                     - qcom,msm8916-cci
>>   
>> +            - const: qcom,msm8953-cci
> 
> This should be added to the enum above.

Thanks, will update in v2.

Regards
Luca

> 
>>               - const: qcom,msm8996-cci
>>       then:
>>         properties:
>>
>> -- 
>> 2.50.1
>>

[PATCH 2/7] i2c: qcom-cci: Add msm8953 compatible

[Luca Weiss]

Add a config for the v1.2.5 CCI found on msm8953 which has different
values in .params compared to others already supported in the driver.

Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
---
 drivers/i2c/busses/i2c-qcom-cci.c | 46 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 46 insertions(+)

diff --git a/drivers/i2c/busses/i2c-qcom-cci.c b/drivers/i2c/busses/i2c-qcom-cci.c
index a3afa11a71a10dbb720ee9acb566991fe55b98a0..2e3ceafec6cc755ea6083f2e6b85240d1a6d9187 100644
--- a/drivers/i2c/busses/i2c-qcom-cci.c
+++ b/drivers/i2c/busses/i2c-qcom-cci.c
@@ -785,8 +785,54 @@ static const struct cci_data cci_v2_data = {
 	},
 };
 
+static const struct cci_data cci_msm8953_data = {
+	.num_masters = 2,
+	.queue_size = { 64, 16 },
+	.quirks = {
+		.max_write_len = 11,
+		.max_read_len = 12,
+	},
+	.params[I2C_MODE_STANDARD] = {
+		.thigh = 78,
+		.tlow = 114,
+		.tsu_sto = 28,
+		.tsu_sta = 28,
+		.thd_dat = 10,
+		.thd_sta = 77,
+		.tbuf = 118,
+		.scl_stretch_en = 0,
+		.trdhld = 6,
+		.tsp = 1
+	},
+	.params[I2C_MODE_FAST] = {
+		.thigh = 20,
+		.tlow = 28,
+		.tsu_sto = 21,
+		.tsu_sta = 21,
+		.thd_dat = 13,
+		.thd_sta = 18,
+		.tbuf = 32,
+		.scl_stretch_en = 0,
+		.trdhld = 6,
+		.tsp = 3
+	},
+	.params[I2C_MODE_FAST_PLUS] = {
+		.thigh = 16,
+		.tlow = 22,
+		.tsu_sto = 17,
+		.tsu_sta = 18,
+		.thd_dat = 16,
+		.thd_sta = 15,
+		.tbuf = 19,
+		.scl_stretch_en = 1,
+		.trdhld = 3,
+		.tsp = 3
+	},
+};
+
 static const struct of_device_id cci_dt_match[] = {
 	{ .compatible = "qcom,msm8226-cci", .data = &cci_v1_data},
+	{ .compatible = "qcom,msm8953-cci", .data = &cci_msm8953_data},
 	{ .compatible = "qcom,msm8974-cci", .data = &cci_v1_5_data},
 	{ .compatible = "qcom,msm8996-cci", .data = &cci_v2_data},
 

-- 
2.50.1

Re: [PATCH 2/7] i2c: qcom-cci: Add msm8953 compatible

[Wolfram Sang]

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On Sun, Aug 10, 2025 at 05:37:53PM +0200, Luca Weiss wrote:
> Add a config for the v1.2.5 CCI found on msm8953 which has different

Given the above version number...

>  static const struct of_device_id cci_dt_match[] = {
>  	{ .compatible = "qcom,msm8226-cci", .data = &cci_v1_data},
> +	{ .compatible = "qcom,msm8953-cci", .data = &cci_msm8953_data},

... why don't we use it here to stay consistent? cci_v1_2_5_data?

>  	{ .compatible = "qcom,msm8974-cci", .data = &cci_v1_5_data},
>  	{ .compatible = "qcom,msm8996-cci", .data = &cci_v2_data},

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Re: [PATCH 2/7] i2c: qcom-cci: Add msm8953 compatible

[Luca Weiss]

Hi Wolfram,

On 2025-08-11 14:13, Wolfram Sang wrote:
> On Sun, Aug 10, 2025 at 05:37:53PM +0200, Luca Weiss wrote:
>> Add a config for the v1.2.5 CCI found on msm8953 which has different
> 
> Given the above version number...
> 
>>  static const struct of_device_id cci_dt_match[] = {
>>  	{ .compatible = "qcom,msm8226-cci", .data = &cci_v1_data},
>> +	{ .compatible = "qcom,msm8953-cci", .data = &cci_msm8953_data},
> 
> ... why don't we use it here to stay consistent? cci_v1_2_5_data?

I don't think the existing 'v2' or 'v1' configs have much to do with the 
actual
HW_VERSION of the IP block. For example on of the newer Qualcomm SoCs 
has HW
version 1.7.0 and is many years newer than the msm8996 which was called 
'v2'.

I'm also not sure what these parameters depend on, if it's CCI HW 
version, or
something else. So naming it after the SoC should be a safer bet. Also 
the
msm8974-cci was only named 'v1.5' because it's an inbetween mix of the 
v1 and
v2 that were already upstream so arguably that one shouldn't have been 
called
v1.5 in the first place either.

Let me know what you think. Maybe also someone from Qualcomm/Linaro can 
jump
in and share their thoughts, if someone knows more what these params 
depend on.

Regards
Luca

> 
>>  	{ .compatible = "qcom,msm8974-cci", .data = &cci_v1_5_data},
>>  	{ .compatible = "qcom,msm8996-cci", .data = &cci_v2_data},

Re: [PATCH 2/7] i2c: qcom-cci: Add msm8953 compatible

[Wolfram Sang]

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Hi Luca,

> I'm also not sure what these parameters depend on, if it's CCI HW version,
> or
> something else. So naming it after the SoC should be a safer bet. Also the
> msm8974-cci was only named 'v1.5' because it's an inbetween mix of the v1
> and
> v2 that were already upstream so arguably that one shouldn't have been
> called
> v1.5 in the first place either.
> 
> Let me know what you think. Maybe also someone from Qualcomm/Linaro can jump
> in and share their thoughts, if someone knows more what these params depend
> on.

Thanks for the heads up. I agree that it needs someone from Qualcomm for
definite answers. But if nobody chimes in, your patch is good as is from
my side.

Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Thanks,

   Wolfram


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Re: [PATCH 2/7] i2c: qcom-cci: Add msm8953 compatible

[Loic Poulain]

On Fri, Aug 15, 2025 at 10:31 AM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
>
> Hi Luca,
>
> > I'm also not sure what these parameters depend on, if it's CCI HW version,
> > or
> > something else. So naming it after the SoC should be a safer bet. Also the
> > msm8974-cci was only named 'v1.5' because it's an inbetween mix of the v1
> > and
> > v2 that were already upstream so arguably that one shouldn't have been
> > called
> > v1.5 in the first place either.

That's correct, this is a local version, not matching HW IP version.
The config depends both on the HW version and the CCI core clock.
As our timings are statically configured we should also ensure that
the CCI clock is correct...

> >
> > Let me know what you think. Maybe also someone from Qualcomm/Linaro can jump
> > in and share their thoughts, if someone knows more what these params depend
> > on.

That's fair enough.

Reviewed-by: Loic Poulain <loic.poulain@oss.qualcomm.com>

Re: [PATCH 2/7] i2c: qcom-cci: Add msm8953 compatible

[Konrad Dybcio]

On 8/15/25 9:12 AM, Luca Weiss wrote:
> Hi Wolfram,
> 
> On 2025-08-11 14:13, Wolfram Sang wrote:
>> On Sun, Aug 10, 2025 at 05:37:53PM +0200, Luca Weiss wrote:
>>> Add a config for the v1.2.5 CCI found on msm8953 which has different
>>
>> Given the above version number...
>>
>>>  static const struct of_device_id cci_dt_match[] = {
>>>      { .compatible = "qcom,msm8226-cci", .data = &cci_v1_data},
>>> +    { .compatible = "qcom,msm8953-cci", .data = &cci_msm8953_data},
>>
>> ... why don't we use it here to stay consistent? cci_v1_2_5_data?
> 
> I don't think the existing 'v2' or 'v1' configs have much to do with the actual
> HW_VERSION of the IP block. For example on of the newer Qualcomm SoCs has HW
> version 1.7.0 and is many years newer than the msm8996 which was called 'v2'.

Most of the i2c-speed-dependent configs are electrical and therefore may
be configured as you wish.. I recall Sony Xperia kernels made changes to
that rather often, whether really necessary - I don't know.
The programming guide suggests a couple sets of values, picked in order
to meet the I2C spec.

The queue depths and max r/w lengths are per-instance (SoC specific) and
change very rarely.

> 
> I'm also not sure what these parameters depend on, if it's CCI HW version, or
> something else. So naming it after the SoC should be a safer bet. Also the
> msm8974-cci was only named 'v1.5' because it's an inbetween mix of the v1 and
> v2 that were already upstream so arguably that one shouldn't have been called
> v1.5 in the first place either.

AFAICS there is no "v2" CCI in existence, msm8996 is v1.4.0 and newer
platforms are v1.x.y.

JFYI there's a revision ID register at (base + 0x0) which the driver's probe
function conveniently reads and prints with dev_dbg.

Konrad

[PATCH 3/7] dt-bindings: eeprom: at24: Add compatible for Belling BL24S64

[Luca Weiss]

Add the compatible for an 64Kb EEPROM from Belling.

Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
---
 Documentation/devicetree/bindings/eeprom/at24.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml
index 0ac68646c077790c67c424d0f9157d6ec9b9e331..1e88861674ac8525335edec1b214675c8efa3ffe 100644
--- a/Documentation/devicetree/bindings/eeprom/at24.yaml
+++ b/Documentation/devicetree/bindings/eeprom/at24.yaml
@@ -131,6 +131,7 @@ properties:
           - const: atmel,24c32
       - items:
           - enum:
+              - belling,bl24s64
               - onnn,n24s64b
               - puya,p24c64f
           - const: atmel,24c64

-- 
2.50.1

Re: [PATCH 3/7] dt-bindings: eeprom: at24: Add compatible for Belling BL24S64

[Rob Herring]

On Sun, Aug 10, 2025 at 05:37:54PM +0200, Luca Weiss wrote:
> Add the compatible for an 64Kb EEPROM from Belling.

It is generally not required to add a compatible here assuming 
"atmel,24c64" is enough to identify the specific device (i.e. read the 
device's ID registers). If it is not sufficient, then some details here 
about why would be useful.

> 
> Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
> ---
>  Documentation/devicetree/bindings/eeprom/at24.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml
> index 0ac68646c077790c67c424d0f9157d6ec9b9e331..1e88861674ac8525335edec1b214675c8efa3ffe 100644
> --- a/Documentation/devicetree/bindings/eeprom/at24.yaml
> +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml
> @@ -131,6 +131,7 @@ properties:
>            - const: atmel,24c32
>        - items:
>            - enum:
> +              - belling,bl24s64
>                - onnn,n24s64b
>                - puya,p24c64f
>            - const: atmel,24c64
> 
> -- 
> 2.50.1
> 

Re: [PATCH 3/7] dt-bindings: eeprom: at24: Add compatible for Belling BL24S64

[Luca Weiss]

Hi Rob,

On 18-08-2025 5:51 p.m., Rob Herring wrote:
> On Sun, Aug 10, 2025 at 05:37:54PM +0200, Luca Weiss wrote:
>> Add the compatible for an 64Kb EEPROM from Belling.
> 
> It is generally not required to add a compatible here assuming
> "atmel,24c64" is enough to identify the specific device (i.e. read the
> device's ID registers). If it is not sufficient, then some details here
> about why would be useful.

I thought DT was meant to describe the hardware, and this specific 
EEPROM on the device is a Belling BL24S64, and it's software-compatible 
to this generic atmel compatible.
That's why we have compatible = "belling,bl24s64", "atmel,24c64";

Am I missing something, or misunderstanding how DT is meant to be written?

Regards
Luca

> 
>>
>> Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
>> ---
>>   Documentation/devicetree/bindings/eeprom/at24.yaml | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml
>> index 0ac68646c077790c67c424d0f9157d6ec9b9e331..1e88861674ac8525335edec1b214675c8efa3ffe 100644
>> --- a/Documentation/devicetree/bindings/eeprom/at24.yaml
>> +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml
>> @@ -131,6 +131,7 @@ properties:
>>             - const: atmel,24c32
>>         - items:
>>             - enum:
>> +              - belling,bl24s64
>>                 - onnn,n24s64b
>>                 - puya,p24c64f
>>             - const: atmel,24c64
>>
>> -- 
>> 2.50.1
>>

Re: [PATCH 3/7] dt-bindings: eeprom: at24: Add compatible for Belling BL24S64

[Bartosz Golaszewski]

On Mon, Aug 18, 2025 at 7:46 PM Luca Weiss <luca@lucaweiss.eu> wrote:
>
> Hi Rob,
>
> On 18-08-2025 5:51 p.m., Rob Herring wrote:
> > On Sun, Aug 10, 2025 at 05:37:54PM +0200, Luca Weiss wrote:
> >> Add the compatible for an 64Kb EEPROM from Belling.
> >
> > It is generally not required to add a compatible here assuming
> > "atmel,24c64" is enough to identify the specific device (i.e. read the
> > device's ID registers). If it is not sufficient, then some details here
> > about why would be useful.
>
> I thought DT was meant to describe the hardware, and this specific
> EEPROM on the device is a Belling BL24S64, and it's software-compatible
> to this generic atmel compatible.
> That's why we have compatible = "belling,bl24s64", "atmel,24c64";
>
> Am I missing something, or misunderstanding how DT is meant to be written?
>

Right, this is what we've been doing historically which is evident by
the number of compatibles we have in the schema that are never
mentioned in the driver C code.

Bartosz

[PATCH 4/7] arm64: dts: qcom: msm8953: Re-sort tlmm pinctrl states

[Luca Weiss]

Follow the Devicetree Sources Coding Style and sort the pinctrl nodes by
the pins property. This makes it simpler to add new pinctrl states in
the future.

Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
---
 arch/arm64/boot/dts/qcom/msm8953.dtsi | 439 +++++++++++++++++-----------------
 1 file changed, 219 insertions(+), 220 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index c5205d09c442e45e4a0cc3e6d8ff7d9d7bda0034..c8a1a91f033320645395e5aa216c0112746a9a8e 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -545,6 +545,20 @@ tlmm: pinctrl@1000000 {
 			interrupt-controller;
 			#interrupt-cells = <2>;
 
+			i2c_1_default: i2c-1-default-state {
+				pins = "gpio2", "gpio3";
+				function = "blsp_i2c1";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			i2c_1_sleep: i2c-1-sleep-state {
+				pins = "gpio2", "gpio3";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
 			uart_console_active: uart-console-active-state {
 				pins = "gpio4", "gpio5";
 				function = "blsp_uart2";
@@ -559,6 +573,211 @@ uart_console_sleep: uart-console-sleep-state {
 				bias-pull-down;
 			};
 
+			i2c_2_default: i2c-2-default-state {
+				pins = "gpio6", "gpio7";
+				function = "blsp_i2c2";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			i2c_2_sleep: i2c-2-sleep-state {
+				pins = "gpio6", "gpio7";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			i2c_3_default: i2c-3-default-state {
+				pins = "gpio10", "gpio11";
+				function = "blsp_i2c3";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			i2c_3_sleep: i2c-3-sleep-state {
+				pins = "gpio10", "gpio11";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			spi_3_default: spi-3-default-state {
+				pins = "gpio10", "gpio11";
+				function = "blsp_spi3";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			spi_3_sleep: spi-3-sleep-state {
+				pins = "gpio10", "gpio11";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			i2c_4_default: i2c-4-default-state {
+				pins = "gpio14", "gpio15";
+				function = "blsp_i2c4";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			i2c_4_sleep: i2c-4-sleep-state {
+				pins = "gpio14", "gpio15";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			uart_5_default: uart-5-default-state {
+				pins = "gpio16", "gpio17", "gpio18", "gpio19";
+				function = "blsp_uart5";
+				drive-strength = <16>;
+				bias-disable;
+			};
+
+			uart_5_sleep: uart-5-sleep-state {
+				pins = "gpio16", "gpio17", "gpio18", "gpio19";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			i2c_5_default: i2c-5-default-state {
+				pins = "gpio18", "gpio19";
+				function = "blsp_i2c5";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			i2c_5_sleep: i2c-5-sleep-state {
+				pins = "gpio18", "gpio19";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			spi_5_default: spi-5-default-state {
+				pins = "gpio18", "gpio19";
+				function = "blsp_spi5";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			spi_5_sleep: spi-5-sleep-state {
+				pins = "gpio18", "gpio19";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			i2c_6_default: i2c-6-default-state {
+				pins = "gpio22", "gpio23";
+				function = "blsp_i2c6";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			i2c_6_sleep: i2c-6-sleep-state {
+				pins = "gpio22", "gpio23";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			spi_6_default: spi-6-default-state {
+				pins = "gpio22", "gpio23";
+				function = "blsp_spi6";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			spi_6_sleep: spi-6-sleep-state {
+				pins = "gpio22", "gpio23";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			wcnss_pin_a: wcnss-active-state {
+				wcss-wlan2-pins {
+					pins = "gpio76";
+					function = "wcss_wlan2";
+					drive-strength = <6>;
+					bias-pull-up;
+				};
+
+				wcss-wlan1-pins {
+					pins = "gpio77";
+					function = "wcss_wlan1";
+					drive-strength = <6>;
+					bias-pull-up;
+				};
+
+				wcss-wlan0-pins {
+					pins = "gpio78";
+					function = "wcss_wlan0";
+					drive-strength = <6>;
+					bias-pull-up;
+				};
+
+				wcss-wlan-pins {
+					pins = "gpio79", "gpio80";
+					function = "wcss_wlan";
+					drive-strength = <6>;
+					bias-pull-up;
+				};
+			};
+
+			gpio_key_default: gpio-key-default-state {
+				pins = "gpio85";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-pull-up;
+			};
+
+			i2c_8_default: i2c-8-default-state {
+				pins = "gpio98", "gpio99";
+				function = "blsp_i2c8";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			i2c_8_sleep: i2c-8-sleep-state {
+				pins = "gpio98", "gpio99";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			sdc2_cd_on: cd-on-state {
+				pins = "gpio133";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-pull-up;
+			};
+
+			sdc2_cd_off: cd-off-state {
+				pins = "gpio133";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			i2c_7_default: i2c-7-default-state {
+				pins = "gpio135", "gpio136";
+				function = "blsp_i2c7";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			i2c_7_sleep: i2c-7-sleep-state {
+				pins = "gpio135", "gpio136";
+				function = "gpio";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
 			sdc1_clk_on: sdc1-clk-on-state {
 				pins = "sdc1_clk";
 				bias-disable;
@@ -640,226 +859,6 @@ sdc2_data_off: sdc2-data-off-state {
 				bias-pull-up;
 				drive-strength = <2>;
 			};
-
-			sdc2_cd_on: cd-on-state {
-				pins = "gpio133";
-				function = "gpio";
-				drive-strength = <2>;
-				bias-pull-up;
-			};
-
-			sdc2_cd_off: cd-off-state {
-				pins = "gpio133";
-				function = "gpio";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			gpio_key_default: gpio-key-default-state {
-				pins = "gpio85";
-				function = "gpio";
-				drive-strength = <2>;
-				bias-pull-up;
-			};
-
-			i2c_1_default: i2c-1-default-state {
-				pins = "gpio2", "gpio3";
-				function = "blsp_i2c1";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			i2c_1_sleep: i2c-1-sleep-state {
-				pins = "gpio2", "gpio3";
-				function = "gpio";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			i2c_2_default: i2c-2-default-state {
-				pins = "gpio6", "gpio7";
-				function = "blsp_i2c2";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			i2c_2_sleep: i2c-2-sleep-state {
-				pins = "gpio6", "gpio7";
-				function = "gpio";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			i2c_3_default: i2c-3-default-state {
-				pins = "gpio10", "gpio11";
-				function = "blsp_i2c3";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			i2c_3_sleep: i2c-3-sleep-state {
-				pins = "gpio10", "gpio11";
-				function = "gpio";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			i2c_4_default: i2c-4-default-state {
-				pins = "gpio14", "gpio15";
-				function = "blsp_i2c4";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			i2c_4_sleep: i2c-4-sleep-state {
-				pins = "gpio14", "gpio15";
-				function = "gpio";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			i2c_5_default: i2c-5-default-state {
-				pins = "gpio18", "gpio19";
-				function = "blsp_i2c5";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			i2c_5_sleep: i2c-5-sleep-state {
-				pins = "gpio18", "gpio19";
-				function = "gpio";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			i2c_6_default: i2c-6-default-state {
-				pins = "gpio22", "gpio23";
-				function = "blsp_i2c6";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			i2c_6_sleep: i2c-6-sleep-state {
-				pins = "gpio22", "gpio23";
-				function = "gpio";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			i2c_7_default: i2c-7-default-state {
-				pins = "gpio135", "gpio136";
-				function = "blsp_i2c7";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			i2c_7_sleep: i2c-7-sleep-state {
-				pins = "gpio135", "gpio136";
-				function = "gpio";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			i2c_8_default: i2c-8-default-state {
-				pins = "gpio98", "gpio99";
-				function = "blsp_i2c8";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			i2c_8_sleep: i2c-8-sleep-state {
-				pins = "gpio98", "gpio99";
-				function = "gpio";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			spi_3_default: spi-3-default-state {
-				pins = "gpio10", "gpio11";
-				function = "blsp_spi3";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			spi_3_sleep: spi-3-sleep-state {
-				pins = "gpio10", "gpio11";
-				function = "gpio";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			spi_5_default: spi-5-default-state {
-				pins = "gpio18", "gpio19";
-				function = "blsp_spi5";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			spi_5_sleep: spi-5-sleep-state {
-				pins = "gpio18", "gpio19";
-				function = "gpio";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			spi_6_default: spi-6-default-state {
-				pins = "gpio22", "gpio23";
-				function = "blsp_spi6";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			spi_6_sleep: spi-6-sleep-state {
-				pins = "gpio22", "gpio23";
-				function = "gpio";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			uart_5_default: uart-5-default-state {
-				pins = "gpio16", "gpio17", "gpio18", "gpio19";
-				function = "blsp_uart5";
-				drive-strength = <16>;
-				bias-disable;
-			};
-
-			uart_5_sleep: uart-5-sleep-state {
-				pins = "gpio16", "gpio17", "gpio18", "gpio19";
-				function = "gpio";
-				drive-strength = <2>;
-				bias-disable;
-			};
-
-			wcnss_pin_a: wcnss-active-state {
-
-				wcss-wlan2-pins {
-					pins = "gpio76";
-					function = "wcss_wlan2";
-					drive-strength = <6>;
-					bias-pull-up;
-				};
-
-				wcss-wlan1-pins {
-					pins = "gpio77";
-					function = "wcss_wlan1";
-					drive-strength = <6>;
-					bias-pull-up;
-				};
-
-				wcss-wlan0-pins {
-					pins = "gpio78";
-					function = "wcss_wlan0";
-					drive-strength = <6>;
-					bias-pull-up;
-				};
-
-				wcss-wlan-pins {
-					pins = "gpio79", "gpio80";
-					function = "wcss_wlan";
-					drive-strength = <6>;
-					bias-pull-up;
-				};
-			};
 		};
 
 		gcc: clock-controller@1800000 {

-- 
2.50.1

Re: [PATCH 4/7] arm64: dts: qcom: msm8953: Re-sort tlmm pinctrl states

[Konrad Dybcio]

On 8/10/25 5:37 PM, Luca Weiss wrote:
> Follow the Devicetree Sources Coding Style and sort the pinctrl nodes by
> the pins property. This makes it simpler to add new pinctrl states in
> the future.
> 
> Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

[PATCH 5/7] arm64: dts: qcom: msm8953: Add CCI nodes

[Luca Weiss]

Add the nodes for the camera I2C bus on the MSM8953 SoC.

Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
---
 arch/arm64/boot/dts/qcom/msm8953.dtsi | 57 +++++++++++++++++++++++++++++++++++
 1 file changed, 57 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index c8a1a91f033320645395e5aa216c0112746a9a8e..e10949db58e343c6913f6922acb764972a3d381d 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -699,6 +699,20 @@ spi_6_sleep: spi-6-sleep-state {
 				bias-disable;
 			};
 
+			cci0_default: cci0-default-state {
+				pins = "gpio29", "gpio30";
+				function = "cci_i2c";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
+			cci1_default: cci1-default-state {
+				pins = "gpio31", "gpio32";
+				function = "cci_i2c";
+				drive-strength = <2>;
+				bias-disable;
+			};
+
 			wcnss_pin_a: wcnss-active-state {
 				wcss-wlan2-pins {
 					pins = "gpio76";
@@ -1114,6 +1128,49 @@ mdss_dsi1_phy: phy@1a96400 {
 			};
 		};
 
+		cci: cci@1b0c000 {
+			compatible = "qcom,msm8953-cci";
+			reg = <0x1b0c000 0x4000>;
+
+			interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
+
+			clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
+				 <&gcc GCC_CAMSS_CCI_AHB_CLK>,
+				 <&gcc GCC_CAMSS_CCI_CLK>,
+				 <&gcc GCC_CAMSS_AHB_CLK>;
+			clock-names = "camss_top_ahb",
+				      "cci_ahb",
+				      "cci",
+				      "camss_ahb";
+
+			assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
+					  <&gcc GCC_CAMSS_CCI_CLK>;
+			assigned-clock-rates = <80000000>,
+					       <19200000>;
+
+			pinctrl-0 = <&cci0_default &cci1_default>;
+			pinctrl-names = "default";
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			status = "disabled";
+
+			cci_i2c0: i2c-bus@0 {
+				reg = <0>;
+				clock-frequency = <400000>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+
+			cci_i2c1: i2c-bus@1 {
+				reg = <1>;
+				clock-frequency = <400000>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+		};
+
 		gpu: gpu@1c00000 {
 			compatible = "qcom,adreno-506.0", "qcom,adreno";
 			reg = <0x01c00000 0x40000>;

-- 
2.50.1

Re: [PATCH 5/7] arm64: dts: qcom: msm8953: Add CCI nodes

[Konrad Dybcio]

On 8/10/25 5:37 PM, Luca Weiss wrote:
> Add the nodes for the camera I2C bus on the MSM8953 SoC.
> 
> Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

[PATCH 6/7] arm64: dts: qcom: sdm632-fairphone-fp3: Add camera fixed regulators

[Luca Weiss]

Add the definitions for a few fixed regulators found on the Fairphone 3.

Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
---
 arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts | 36 +++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts b/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts
index 55a45b528bd3f1bf9b6fe7882753338b43c62271..557925a6627665614caefed65d86a42c1e55ab8d 100644
--- a/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts
+++ b/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts
@@ -36,6 +36,42 @@ key-volume-up {
 		};
 	};
 
+	vreg_cam_af_2p85: regulator-cam-af-2p85 {
+		compatible = "regulator-fixed";
+		regulator-name = "cam_af_2p85";
+		regulator-min-microvolt = <2850000>;
+		regulator-max-microvolt = <2850000>;
+
+		gpio = <&tlmm 128 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+
+		vin-supply = <&vph_pwr>;
+	};
+
+	vreg_cam_io_1p8: regulator-cam-io-1p8 {
+		compatible = "regulator-fixed";
+		regulator-name = "cam_io_1p8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+
+		gpio = <&tlmm 130 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+
+		vin-supply = <&vph_pwr>;
+	};
+
+	vreg_cam2_dig_1p2: regulator-cam2-dig-1p2 {
+		compatible = "regulator-fixed";
+		regulator-name = "cam2_dig_1p2";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+
+		gpio = <&tlmm 46 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+
+		vin-supply = <&vph_pwr>;
+	};
+
 	/* Dummy regulator until PMI632 has LCDB VSP/VSN support */
 	lcdb_dummy: regulator-lcdb-dummy {
 		compatible = "regulator-fixed";

-- 
2.50.1

Re: [PATCH 6/7] arm64: dts: qcom: sdm632-fairphone-fp3: Add camera fixed regulators

[Konrad Dybcio]

On 8/10/25 5:37 PM, Luca Weiss wrote:
> Add the definitions for a few fixed regulators found on the Fairphone 3.
> 
> Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

[PATCH 7/7] arm64: dts: qcom: sdm632-fairphone-fp3: Enable CCI and add EEPROM

[Luca Weiss]

Enable the CCI where the camera modules are connected to, and add a node
for the EEPROM found next to the IMX363 rear camera.

Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
---
 arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts b/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts
index 557925a6627665614caefed65d86a42c1e55ab8d..0edb2992b902ec1bee3f80aa75e50f3514091f28 100644
--- a/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts
+++ b/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts
@@ -88,6 +88,27 @@ vph_pwr: vph-pwr-regulator {
 	};
 };
 
+&cci {
+	status = "okay";
+};
+
+&cci_i2c0 {
+	/* Sony IMX363 (rear) @ 0x10 */
+
+	eeprom@50 {
+		compatible = "belling,bl24s64", "atmel,24c64";
+		reg = <0x50>;
+		vcc-supply = <&vreg_cam_io_1p8>;
+		read-only;
+	};
+
+	/* ON Semi LC898217 VCM @ 0x72 */
+};
+
+&cci_i2c1 {
+	/* Samsung S5K4H7YX (front) @ 0x10 */
+};
+
 &gpu {
 	status = "okay";
 };

-- 
2.50.1

Re: [PATCH 7/7] arm64: dts: qcom: sdm632-fairphone-fp3: Enable CCI and add EEPROM

[Konrad Dybcio]

On 8/10/25 5:37 PM, Luca Weiss wrote:
> Enable the CCI where the camera modules are connected to, and add a node
> for the EEPROM found next to the IMX363 rear camera.
> 
> Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad