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Mon, 09 Dec 2024 06:43:36 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4B96haCg024382 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 9 Dec 2024 06:43:36 GMT Received: from [10.152.195.140] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Sun, 8 Dec 2024 22:43:32 -0800 Message-ID: Date: Mon, 9 Dec 2024 12:13:29 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/4] arm64: dts: qcom: ipq5424: configure spi0 node for rdp466 To: Konrad Dybcio , , , , , , , , , , CC: , References: <20241122124505.1688436-1-quic_mmanikan@quicinc.com> <20241122124505.1688436-5-quic_mmanikan@quicinc.com> <249fb0aa-5624-41cb-8a3b-c2e54dba87df@oss.qualcomm.com> Content-Language: en-US From: Manikanta Mylavarapu In-Reply-To: <249fb0aa-5624-41cb-8a3b-c2e54dba87df@oss.qualcomm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ocV8A6s3eBXsm7eJxQd1IJenPenF7FPs X-Proofpoint-ORIG-GUID: ocV8A6s3eBXsm7eJxQd1IJenPenF7FPs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 mlxscore=0 adultscore=0 clxscore=1015 malwarescore=0 phishscore=0 spamscore=0 mlxlogscore=881 lowpriorityscore=0 priorityscore=1501 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412090052 On 12/5/2024 11:00 PM, Konrad Dybcio wrote: > On 22.11.2024 1:45 PM, Manikanta Mylavarapu wrote: >> Enable the SPI0 node and configure the associated gpio pins. >> >> Signed-off-by: Manikanta Mylavarapu >> --- >> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 45 +++++++++++++++++++++ >> 1 file changed, 45 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> index d4d31026a026..6256216ca764 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> @@ -23,6 +23,36 @@ &sleep_clk { >> }; >> >> &tlmm { >> + spi0_default_state: spi0-default-state { >> + clk-pins { >> + pins = "gpio6"; >> + function = "spi0_clk"; >> + drive-strength = <8>; >> + bias-pull-down; >> + }; >> + >> + cs-pins { >> + pins = "gpio7"; >> + function = "spi0_cs"; >> + drive-strength = <8>; >> + bias-pull-up; >> + }; >> + >> + miso-pins { >> + pins = "gpio8"; >> + function = "spi0_miso"; >> + drive-strength = <8>; >> + bias-pull-down; >> + }; >> + >> + mosi-pins { >> + pins = "gpio9"; >> + function = "spi0_mosi"; >> + drive-strength = <8>; >> + bias-pull-down; >> + }; >> + }; >> + >> sdc_default_state: sdc-default-state { >> clk-pins { >> pins = "gpio5"; >> @@ -57,3 +87,18 @@ &xo_board { >> clock-frequency = <24000000>; >> }; >> >> +&qupv3 { >> + spi0: spi@1a90000 { > > &spi0 { > pinctrl-0 = <.. > ... > }; > Thanks for reviewing the patch. I will update in the next version. Thanks & Regards, Manikanta.