From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8656038C2D0; Tue, 3 Mar 2026 09:19:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772529558; cv=none; b=DQUT8EruMWYM9mY7FnHtT5ct7faeEi3nPvIzS9+zUwclQnZPaeMqZcmvB6trgID16SfbNycesPCs6mQvepl1k7TbQRopoeKftGPW/etilI7+IUwKyQUN9WsCxEmympbXp8Mk8xM8V7uImsMksM+wRrBwIzEKmN2l3xy3+htAF5g= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772529558; c=relaxed/simple; bh=aS0Q+f7SHHFw1yREg5BbU7Bsh0kSlyyHqmg0Lk8akx8=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=FNRjo+x321LghPwaenuTiLulxBaFACgg3YhgLzMjsIOcN+HwLojQ3GUDp66kimPplKoi5JyLxkqeZTXjugKpAfu1+XBV9OfvwFILB87z8a8QEOq+yeBnzJ/Gb5YIbFiW6INzfprIC5yG3r8HVKkto/pIAYd20XuSqujyGKrBPSk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=s7pWR2K3; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="s7pWR2K3" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1B73FC116C6; Tue, 3 Mar 2026 09:19:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772529558; bh=aS0Q+f7SHHFw1yREg5BbU7Bsh0kSlyyHqmg0Lk8akx8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=s7pWR2K327EuFeJ9Ohh7aDaEGYyxlpKRE/AaTuyWYat61baizv83KA0zJaFa5Z5hA Ot5k0Si78cM02FbOBaEmXpeoUAw1iT4Hf30EUYt99FOe/FaNPvjzPcXSKKIG5QVoK6 ehKJ02twPRa90HZ5QuGkDU4gLNVMu9j2jP+ajZCT382c6Os8YwvsUIfwc3MIPZfxQr z53ioJ1R3YnCG7aDGI0UFGJEjFdpZiZYdcMPseH3riBeMeiFvYO75XmIbw7/Hz3Mt5 vlrc5496X6rjfK8lLQH5dlU+oV9m1goOjrls/YOFaHav5+wIIh0P7plqgRb6guYqcG vJDwKFU62obGw== Received: from johan by xi.lan with local (Exim 4.98.2) (envelope-from ) id 1vxLtn-000000001pU-1EF7; Tue, 03 Mar 2026 10:18:39 +0100 Date: Tue, 3 Mar 2026 10:18:39 +0100 From: Johan Hovold To: Abel Vesa Cc: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kuogee Hsieh , Abel Vesa , Dmitry Baryshkov , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH v4] dt-bindings: display: msm: Fix reg ranges and clocks on Glymur Message-ID: References: <20260303-glymur-fix-dp-bindings-reg-clocks-v4-1-1ebd9c7c2cee@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260303-glymur-fix-dp-bindings-reg-clocks-v4-1-1ebd9c7c2cee@oss.qualcomm.com> On Tue, Mar 03, 2026 at 11:03:11AM +0200, Abel Vesa wrote: > The Glymur platform has four DisplayPort controllers. The hardware > supports four streams (MST) per controller. However, on Glymur the first > three controllers only have two streams wired to the display subsystem, > while the fourth controller operates in single-stream mode. > > Add a dedicated clause for the Glymur compatible to require the register > ranges for all four stream blocks, while allowing either one pixel clock > (for the single-stream controller) or two pixel clocks (for the remaining > controllers). > > Update the Glymur MDSS schema example by adding the missing p2, p3, > mst2link and mst3link register blocks. Without these, the bindings > validation fails. Also replace the made-up register addresses with the > actual addresses from the first controller to match the SoC devicetree > description. > > Cc: stable@vger.kernel.org # v6.19 No need to backport this, it's essentially just a documentation fix (not a bug fix). > Fixes: 8f63bf908213 ("dt-bindings: display: msm: Document the Glymur DiplayPort controller") > Fixes: 1aee577bbc60 ("dt-bindings: display: msm: Document the Glymur Mobile Display SubSystem") > Signed-off-by: Abel Vesa Johan