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[83.9.3.225]) by smtp.gmail.com with ESMTPSA id y26-20020a2e321a000000b002934febffe4sm5454811ljy.128.2023.03.29.04.31.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 29 Mar 2023 04:32:00 -0700 (PDT) Message-ID: Date: Wed, 29 Mar 2023 13:31:58 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH 6/7] arm64: dts: qcom: sa8775p: add the GPU clock controller node Content-Language: en-US To: Bartosz Golaszewski , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Bartosz Golaszewski References: <20230328193632.226095-1-brgl@bgdev.pl> <20230328193632.226095-7-brgl@bgdev.pl> From: Konrad Dybcio In-Reply-To: <20230328193632.226095-7-brgl@bgdev.pl> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 28.03.2023 21:36, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski > > Add the GPUCC node for sa8775p platforms. > > Signed-off-by: Bartosz Golaszewski > --- > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > index 9ab630c7d81b..4c45ad1cc7ff 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > @@ -591,6 +591,18 @@ tcsr_mutex: hwlock@1f40000 { > #hwlock-cells = <1>; > }; > > + gpucc: clock-controller@3d90000 { > + compatible = "qcom,sa8775p-gpucc"; > + reg = <0x0 0x03d90000 0x0 0xa000>; > + clocks = <&gcc GCC_GPU_CFG_AHB_CLK>, > + <&rpmhcc RPMH_CXO_CLK>, > + <&gcc GCC_GPU_GPLL0_CLK_SRC>, > + <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; Without the first clock, as pointed out in the clk review: Reviewed-by: Konrad Dybcio (that also makes it compatible with the generic gpucc bindings!) Konrad > + #clock-cells = <1>; > + #reset-cells = <1>; > + #power-domain-cells = <1>; > + }; > + > pdc: interrupt-controller@b220000 { > compatible = "qcom,sa8775p-pdc", "qcom,pdc"; > reg = <0x0 0x0b220000 0x0 0x30000>,