From: Sinan Kaya <okaya@codeaurora.org>
To: James Hogan <james.hogan@mips.com>
Cc: linux-mips@linux-mips.org, arnd@arndb.de, timur@codeaurora.org,
sulrich@codeaurora.org, linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Ralf Baechle <ralf@linux-mips.org>,
Paul Burton <paul.burton@mips.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 2/2] MIPS: io: add a barrier after register read in readX()
Date: Wed, 11 Apr 2018 16:48:54 -0400 [thread overview]
Message-ID: <abcad691-2ac8-ffc5-30a2-77ad6781664a@codeaurora.org> (raw)
In-Reply-To: <20180411202616.GA14760@jhogan-linux.mipstec.com>
On 4/11/2018 4:26 PM, James Hogan wrote:
> On Wed, Apr 11, 2018 at 01:10:41PM -0400, Sinan Kaya wrote:
>> How is the likelihood of getting this fixed on 4.17 kernel?
>
> High.
>
Thanks for the confirmation.
> Thanks
> James
>
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2018-04-11 20:48 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-03 12:55 [PATCH v3 1/2] MIPS: io: prevent compiler reordering on the default writeX() implementation Sinan Kaya
2018-04-03 12:55 ` [PATCH v3 2/2] MIPS: io: add a barrier after register read in readX() Sinan Kaya
2018-04-06 1:34 ` Sinan Kaya
2018-04-06 18:15 ` Sinan Kaya
2018-04-06 21:26 ` James Hogan
2018-04-07 21:43 ` Sinan Kaya
2018-04-11 17:10 ` Sinan Kaya
2018-04-11 20:26 ` James Hogan
2018-04-11 20:48 ` Sinan Kaya [this message]
2018-04-11 17:04 ` Maciej W. Rozycki
2018-04-12 21:51 ` James Hogan
2018-04-12 21:58 ` James Hogan
2018-04-12 22:38 ` Sinan Kaya
2018-04-12 22:20 ` Sinan Kaya
2018-04-13 15:41 ` David Laight
2018-04-13 16:36 ` Sinan Kaya
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