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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-12a733fe80esm13039261c88.7.2026.03.23.20.34.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Mar 2026 20:34:33 -0700 (PDT) Date: Mon, 23 Mar 2026 20:34:31 -0700 From: Mike Tipton To: Luca Weiss Cc: Georgi Djakov , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 3/5] clk: qcom: gdsc: Support enabling interconnect path for power domain Message-ID: References: <20260116-milos-camcc-icc-v1-0-400b7fcd156a@fairphone.com> <20260116-milos-camcc-icc-v1-3-400b7fcd156a@fairphone.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260116-milos-camcc-icc-v1-3-400b7fcd156a@fairphone.com> X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI0MDAyNyBTYWx0ZWRfXzNdS2Z5FIfXw N2iWpJQu6FgphRnQ3F1kZsrdWyTZILGGy6ADO+cKVhlD+QCg8LY1K0TLAqZprRLJ6IRBbp76AzK yoL/xByT/OKmdSrJIKU9oCVPD1bTsKInB4+ne6Hxong3DPx3XUCeGt6xf9IdeKd3ofqJBl+NY+7 okqKt4qcYOQwChQUBLCAadvvmdJDjk9PEMCIaDXQS1u0dawp9dEAHNQlGCKctD3NGsMN09E22jw cUBEEUI8A7A40FmA6zX9kLUyogTapG+AmPVTjeUHLxdM+k1QzspuQ33LqNgw1oPDb0zZZ75d4b8 IbxqItaG1118uuaRB+I/Q3295C27ECfpaCotDTAs/SC6HmtrCWDX8yFwhPQR7NGw/E/sY8sctYE xa+zT3WsanYAyQqftLw1y7XvxWBCvxfVq1EDq5r1mZM2D0A6Z0+C2/HFhTn/2KBxaLo5+IaSNXG bCUKeFev5VTJuvKvBCw== X-Proofpoint-ORIG-GUID: tPVrm1uNtDo2s10G6YufZw8_tz-xF8if X-Authority-Analysis: v=2.4 cv=KuhAGGWN c=1 sm=1 tr=0 ts=69c2064b cx=c_pps a=PfFC4Oe2JQzmKTvty2cRDw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=kj9zAlcOel0A:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=6H0WHjuAAAAA:8 a=PAalmAW71AuKxujjx8AA:9 a=CjuIK1q_8ugA:10 a=6Ab_bkdmUrQuMsNx7PHu:22 a=Soq9LBFxuPC4vsCAQt-j:22 X-Proofpoint-GUID: tPVrm1uNtDo2s10G6YufZw8_tz-xF8if X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-24_01,2026-03-23_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 malwarescore=0 phishscore=0 priorityscore=1501 impostorscore=0 spamscore=0 adultscore=0 lowpriorityscore=0 clxscore=1015 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603240027 On Fri, Jan 16, 2026 at 02:17:22PM +0100, Luca Weiss wrote: > On newer SoCs like Milos the CAMSS_TOP_GDSC power domains requires the > enablement of the multimedia NoC, otherwise the GDSC will be stuck on > 'off'. As mentioned in another email, the dependency should actually be in the other direction. Where MMNOC gets stuck turning off if CAM_TOP_GDSC is still on. > > Add support for getting an interconnect path as specified in the SoC > clock driver, and enabling/disabling that interconnect path when the > GDSC is being enabled/disabled. > > Signed-off-by: Luca Weiss > --- > icc_enable()/icc_disable() seems like a nice API but doesn't work > without setting the bandwidth first, so it's not very useful for this > driver, at least I couldn't figure out how to use it correctly. Agreed. In cases where a driver only needs simple zero or non-zero votes, then icc_enable()/icc_disable() don't really help vs. just using icc_set_bw(). > --- > drivers/clk/qcom/gdsc.c | 19 +++++++++++++++++++ > drivers/clk/qcom/gdsc.h | 5 +++++ > 2 files changed, 24 insertions(+) > > diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c > index 7deabf8400cf..ff1acaa3e008 100644 > --- a/drivers/clk/qcom/gdsc.c > +++ b/drivers/clk/qcom/gdsc.c > @@ -7,6 +7,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -261,6 +262,8 @@ static int gdsc_enable(struct generic_pm_domain *domain) > struct gdsc *sc = domain_to_gdsc(domain); > int ret; > > + icc_set_bw(sc->icc_path, 1, 1); Need to handle the error. If the BW request fails, then we shouldn't proceed to enable the GDSC. Additionally, setting BW here doesn't handle the case where the GDSC is enabled as part of gdsc_init(). If we move the icc_set_bw() calls into gdsc_toggle_logic(), then we don't have to care about how many places could ultimately enable or disable it. Since it's a fundamental HW dependency, then placing the BW votes in the common place where we actually toggle the GDSC on/off seems to make the most sense. > + > if (sc->pwrsts == PWRSTS_ON) > return gdsc_deassert_reset(sc); > > @@ -360,6 +363,8 @@ static int gdsc_disable(struct generic_pm_domain *domain) > if (sc->flags & CLAMP_IO) > gdsc_assert_clamp_io(sc); > > + icc_set_bw(sc->icc_path, 0, 0); Similar to above -- we should handle the error case and ideally move into gdsc_toggle_logic(). > + > return 0; > } > > @@ -574,6 +579,20 @@ int gdsc_register(struct gdsc_desc *desc, > if (!data->domains) > return -ENOMEM; > > + for (i = 0; i < num; i++) { > + if (!scs[i] || !scs[i]->needs_icc) > + continue; > + > + scs[i]->icc_path = devm_of_icc_get_by_index(dev, scs[i]->icc_path_index); I generally prefer using string-based DT lookups rather than index-based, i.e. using devm_of_icc_get(). I know our clock drivers have switched to primarily using index-based lookups, but I still generally prefer string lookups: 1. They're self-documenting within DT rather than relying on magic indices. 2. The property name in the driver being non-NULL can indicate whether a handle is expected rather than relying on things like "needs_icc". 3. Would remove the need of adding the new devm_of_icc_get_by_index() API, in this case. There's nothing fundamentally wrong with this and I won't argue hard against it especially considering that it's consistent with how our clock handles are being looked up on more recent targets, but I often find the string lookups to be cleaner and more robust. > + if (IS_ERR(scs[i]->icc_path)) { > + ret = PTR_ERR(scs[i]->icc_path); > + if (ret != -ENODEV) > + return ret; > + > + scs[i]->icc_path = NULL; > + } > + } > + > for (i = 0; i < num; i++) { > if (!scs[i] || !scs[i]->supply) > continue; > diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h > index dd843e86c05b..92ff6bcce7b1 100644 > --- a/drivers/clk/qcom/gdsc.h > +++ b/drivers/clk/qcom/gdsc.h > @@ -9,6 +9,7 @@ > #include > #include > > +struct icc_path; > struct regmap; > struct regulator; > struct reset_controller_dev; > @@ -74,6 +75,10 @@ struct gdsc { > > const char *supply; > struct regulator *rsupply; > + > + bool needs_icc; > + unsigned int icc_path_index; > + struct icc_path *icc_path; > }; > > struct gdsc_desc { > > -- > 2.52.0 > >