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charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNDI1MDEzOSBTYWx0ZWRfX4exiXuxyxSvV PFBegtv3aVEaEXoctPDS7BenceGb9LVwyYv1c6ij8Fc7YGu08i0sZeGocNcqzjL1LqZ25VBjiBR fL3bOT7ZiVybqWsdKffeXNB1LdzZNNYVBmrMVCT2tNrg3fJtTXc2N8XzVVXci8vkQXYUTmDVXqn 2g5q8W2iYrmkY9UdrkfCQs1jtWyzFTO3SEKheHYF8MKDdzpP33mbadDsqo33u3gGlwF3Mb7QPyz SmZfu/emYDqio2oNBJgtzoN3tjmcm/gw2pXIbHHPQZXUn33rQqm74F5A08r9x+NkYs7bNuReA9K gFs5ADCGiUqhkAUSLQKr4CoH+4rzyU7hayqxY+tUSHA+VI4ApvPoqySIM/rmDSyO5TyBHkkVDR8 RScWySITPUoM+MI80t64UByuebhikUl2/IR8bqVp1C+peD4+NywmMN90rtPEyeXRTNlxsA0i X-Proofpoint-GUID: cQUYIMpz4VzFGhU99eLgfwz2TNyW6wYN X-Proofpoint-ORIG-GUID: cQUYIMpz4VzFGhU99eLgfwz2TNyW6wYN X-Authority-Analysis: v=2.4 cv=M5VNKzws c=1 sm=1 tr=0 ts=680be2cb cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=COk6AnOGAAAA:8 a=KKAkSRfTAAAA:8 a=t6Bq4GqqeoWYZpUzuW4A:9 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-04-25_06,2025-04-24_02,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 lowpriorityscore=0 adultscore=0 spamscore=0 priorityscore=1501 mlxscore=0 mlxlogscore=999 malwarescore=0 impostorscore=0 clxscore=1015 suspectscore=0 phishscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2504250139 On 4/25/2025 12:00 PM, Dmitry Baryshkov wrote: > On Fri, Apr 25, 2025 at 11:34:18AM -0700, Jessica Zhang wrote: >> >> >> On 3/7/2025 9:38 PM, Dmitry Baryshkov wrote: >>> From: Abhinav Kumar >>> >>> In order to support more versatile configuration of the display pipes on >>> SC8280XP, enable SmartDMA for this platform. >>> >>> Signed-off-by: Dmitry Baryshkov >> >> Hi Dmitry, >> >> Seems like Abhinav's signed-off-by is missing for the patches that list him >> as author. >> > > Good point. I don't remember, why these patches mark him as an author, > but lack SoB. Googling doesn't point out any previous patches. I think > the easiest way to fix the issue would be for Abhinav to respond with > the SoB. Another option would be for me to reset the author. > I dont recall myself. You can go ahead and drop me as the author. >> Thanks, >> >> Jessica Zhang >> >>> --- >>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 16 ++++++++-------- >>> 1 file changed, 8 insertions(+), 8 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h >>> index fcee1c3665f88a9defca4fec38dd76d56c97297e..923afc202f5195fa15bcfc1e141fc44134c965e4 100644 >>> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h >>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h >>> @@ -74,7 +74,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = { >>> { >>> .name = "sspp_0", .id = SSPP_VIG0, >>> .base = 0x4000, .len = 0x2ac, >>> - .features = VIG_SDM845_MASK, >>> + .features = VIG_SDM845_MASK_SDMA, >>> .sblk = &dpu_vig_sblk_qseed3_3_0, >>> .xin_id = 0, >>> .type = SSPP_TYPE_VIG, >>> @@ -82,7 +82,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = { >>> }, { >>> .name = "sspp_1", .id = SSPP_VIG1, >>> .base = 0x6000, .len = 0x2ac, >>> - .features = VIG_SDM845_MASK, >>> + .features = VIG_SDM845_MASK_SDMA, >>> .sblk = &dpu_vig_sblk_qseed3_3_0, >>> .xin_id = 4, >>> .type = SSPP_TYPE_VIG, >>> @@ -90,7 +90,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = { >>> }, { >>> .name = "sspp_2", .id = SSPP_VIG2, >>> .base = 0x8000, .len = 0x2ac, >>> - .features = VIG_SDM845_MASK, >>> + .features = VIG_SDM845_MASK_SDMA, >>> .sblk = &dpu_vig_sblk_qseed3_3_0, >>> .xin_id = 8, >>> .type = SSPP_TYPE_VIG, >>> @@ -98,7 +98,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = { >>> }, { >>> .name = "sspp_3", .id = SSPP_VIG3, >>> .base = 0xa000, .len = 0x2ac, >>> - .features = VIG_SDM845_MASK, >>> + .features = VIG_SDM845_MASK_SDMA, >>> .sblk = &dpu_vig_sblk_qseed3_3_0, >>> .xin_id = 12, >>> .type = SSPP_TYPE_VIG, >>> @@ -106,7 +106,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = { >>> }, { >>> .name = "sspp_8", .id = SSPP_DMA0, >>> .base = 0x24000, .len = 0x2ac, >>> - .features = DMA_SDM845_MASK, >>> + .features = DMA_SDM845_MASK_SDMA, >>> .sblk = &dpu_dma_sblk, >>> .xin_id = 1, >>> .type = SSPP_TYPE_DMA, >>> @@ -114,7 +114,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = { >>> }, { >>> .name = "sspp_9", .id = SSPP_DMA1, >>> .base = 0x26000, .len = 0x2ac, >>> - .features = DMA_SDM845_MASK, >>> + .features = DMA_SDM845_MASK_SDMA, >>> .sblk = &dpu_dma_sblk, >>> .xin_id = 5, >>> .type = SSPP_TYPE_DMA, >>> @@ -122,7 +122,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = { >>> }, { >>> .name = "sspp_10", .id = SSPP_DMA2, >>> .base = 0x28000, .len = 0x2ac, >>> - .features = DMA_CURSOR_SDM845_MASK, >>> + .features = DMA_CURSOR_SDM845_MASK_SDMA, >>> .sblk = &dpu_dma_sblk, >>> .xin_id = 9, >>> .type = SSPP_TYPE_DMA, >>> @@ -130,7 +130,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = { >>> }, { >>> .name = "sspp_11", .id = SSPP_DMA3, >>> .base = 0x2a000, .len = 0x2ac, >>> - .features = DMA_CURSOR_SDM845_MASK, >>> + .features = DMA_CURSOR_SDM845_MASK_SDMA, >>> .sblk = &dpu_dma_sblk, >>> .xin_id = 13, >>> .type = SSPP_TYPE_DMA, >>> >> >