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Tue, 13 Oct 2020 19:22:02 GMT Sender: akhilpo=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id C5105C433C9; Tue, 13 Oct 2020 19:22:01 +0000 (UTC) Received: from [192.168.1.9] (unknown [117.210.180.193]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: akhilpo) by smtp.codeaurora.org (Postfix) with ESMTPSA id ACF5CC433F1; Tue, 13 Oct 2020 19:21:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org ACF5CC433F1 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=akhilpo@codeaurora.org Subject: Re: [2/2] drm/msm: Add support for GPU cooling To: mka@chromium.org Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@freedesktop.org References: <1602176947-17385-2-git-send-email-akhilpo@codeaurora.org> <20201009183640.GB1292413@google.com> <20201012174035.GA44627@google.com> <80ded484-a058-70fc-be9d-045be2933563@codeaurora.org> <20201013174038.GA424420@google.com> From: Akhil P Oommen Message-ID: Date: Wed, 14 Oct 2020 00:51:55 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.3.1 MIME-Version: 1.0 In-Reply-To: <20201013174038.GA424420@google.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 10/13/2020 11:10 PM, mka@chromium.org wrote: > On Tue, Oct 13, 2020 at 07:23:34PM +0530, Akhil P Oommen wrote: >> On 10/12/2020 11:10 PM, mka@chromium.org wrote: >>> On Mon, Oct 12, 2020 at 07:03:51PM +0530, Akhil P Oommen wrote: >>>> On 10/10/2020 12:06 AM, mka@chromium.org wrote: >>>>> Hi Akhil, >>>>> >>>>> On Thu, Oct 08, 2020 at 10:39:07PM +0530, Akhil P Oommen wrote: >>>>>> Register GPU as a devfreq cooling device so that it can be passively >>>>>> cooled by the thermal framework. >>>>>> >>>>>> Signed-off-by: Akhil P Oommen >>>>>> --- >>>>>> drivers/gpu/drm/msm/msm_gpu.c | 13 ++++++++++++- >>>>>> drivers/gpu/drm/msm/msm_gpu.h | 2 ++ >>>>>> 2 files changed, 14 insertions(+), 1 deletion(-) >>>>>> >>>>>> diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c >>>>>> index 55d1648..93ffd66 100644 >>>>>> --- a/drivers/gpu/drm/msm/msm_gpu.c >>>>>> +++ b/drivers/gpu/drm/msm/msm_gpu.c >>>>>> @@ -14,6 +14,7 @@ >>>>>> #include >>>>>> #include >>>>>> #include >>>>>> +#include >>>>>> #include >>>>>> #include >>>>>> @@ -107,9 +108,18 @@ static void msm_devfreq_init(struct msm_gpu *gpu) >>>>>> if (IS_ERR(gpu->devfreq.devfreq)) { >>>>>> DRM_DEV_ERROR(&gpu->pdev->dev, "Couldn't initialize GPU devfreq\n"); >>>>>> gpu->devfreq.devfreq = NULL; >>>>>> + return; >>>>>> } >>>>>> devfreq_suspend_device(gpu->devfreq.devfreq); >>>>>> + >>>>>> + gpu->cooling = of_devfreq_cooling_register(gpu->pdev->dev.of_node, >>>>>> + gpu->devfreq.devfreq); >>>>>> + if (IS_ERR(gpu->cooling)) { >>>>>> + DRM_DEV_ERROR(&gpu->pdev->dev, >>>>>> + "Couldn't register GPU cooling device\n"); >>>>>> + gpu->cooling = NULL; >>>>>> + } >>>>>> } >>>>>> static int enable_pwrrail(struct msm_gpu *gpu) >>>>>> @@ -926,7 +936,6 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, >>>>>> msm_devfreq_init(gpu); >>>>>> - >> Will remove this unintended change. >>>>>> gpu->aspace = gpu->funcs->create_address_space(gpu, pdev); >>>>>> if (gpu->aspace == NULL) >>>>>> @@ -1005,4 +1014,6 @@ void msm_gpu_cleanup(struct msm_gpu *gpu) >>>>>> gpu->aspace->mmu->funcs->detach(gpu->aspace->mmu); >>>>>> msm_gem_address_space_put(gpu->aspace); >>>>>> } >>>>>> + >>>>>> + devfreq_cooling_unregister(gpu->cooling); >>>>> >>>>> Resources should be released in reverse order, otherwise the cooling device >>>>> could use resources that have already been freed. >>>>> Why do you think this is not the correct order? If you are thinking >>>> about devfreq struct, it is managed device resource. >>> >>> I did not check specifically if changing the frequency really uses any of the >>> resources that are released previously, In any case it's not a good idea to >>> allow other parts of the kernel to use a half initialized/torn down device. >>> Even if it isn't a problem today someone could change the driver to use any >>> of these resources (or add a new one) in a frequency change, without even >>> thinking about the cooling device, just (rightfully) asuming that things are >>> set up and torn down in a sane order. >> 'sane order' relative to what specifically here? Should we worry about freq >> change at this point because we have already disabled gpu runtime pm and >> devfreq? > > GPU runtime PM and the devfreq being disabled is not evident from the context > of the function. You are probably right that it's not a problem in practice, > but why give reason for doubts in the first place if this could be avoided > by following a common practice? > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel > Other option I see is to create a managed device resource (devm) version of the devfreq_cooling_register API and use that. Is that what you are trying to suggest? -Akhil.