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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8dbf1c0213sm418023866b.48.2026.01.30.04.23.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 30 Jan 2026 04:23:15 -0800 (PST) Message-ID: Date: Fri, 30 Jan 2026 13:23:12 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 06/12] soc: qcom: geni-se: Introduce helper APIs for performance control To: Praveen Talari , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mukesh Kumar Savaliya , Viken Dadhaniya , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bryan.odonoghue@linaro.org, dmitry.baryshkov@oss.qualcomm.com, bjorn.andersson@oss.qualcomm.com Cc: prasad.sodagudi@oss.qualcomm.com, quic_vtanuku@quicinc.com, aniket.randive@oss.qualcomm.com, chandana.chiluveru@oss.qualcomm.com References: <20260112104722.591521-1-praveen.talari@oss.qualcomm.com> <20260112104722.591521-7-praveen.talari@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260112104722.591521-7-praveen.talari@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: sboVkRhuXjy13gebstFyJY9Ya039FTCX X-Proofpoint-GUID: sboVkRhuXjy13gebstFyJY9Ya039FTCX X-Authority-Analysis: v=2.4 cv=VMTQXtPX c=1 sm=1 tr=0 ts=697ca2b5 cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=8UfQzV40dBNW6KkxgPsA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTMwMDEwMSBTYWx0ZWRfX6iUMxaZC0+5w ogTfNISFMzGtBNwqeUz1W+2F3eUip7Nq2LqJYgSBAjrEs1otis5puWwKJsTN2TkSuY410uJRKTf X2EJXdjrfPmqHARF4+1Ko9sdR3BRQnHDD8odWFT0FTAlEHpanyH3FYrDUlbEcQJVz25vYgtp+sK kZAaUVO9eXbE/3yZEna6sszdE59474bPQrU/zK2lQTJCXw3MWncaxE8Fdq6G1Qf2SyCzOpVJ1a4 R1yxNZSo4B5s+r43SXqhRonRjf5OpGQ4+LChunGcy+yhq+iJDKdsGl1u07yoxddgN6Ui4Hq1g1g ruW2qWaOhZNo+VQFPRvliASCeW2gGDWZ1+R8nEWLu4ZPOen1TjqumctPY8zuEDXNhrYkalbH0QL ez4RTH9aSA8FPm7SHogNE6EyMvfPMLFfuaOebSIkRK/eEol2UkvL3OQxow1JOdKB/upQ4/5O8Fq Ze6IKt3Be2LtLOwswoQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-30_01,2026-01-29_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 bulkscore=0 lowpriorityscore=0 impostorscore=0 adultscore=0 phishscore=0 suspectscore=0 spamscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601300101 On 1/12/26 11:47 AM, Praveen Talari wrote: > The GENI Serial Engine (SE) drivers (I2C, SPI, and SERIAL) currently > manage performance levels and operating points directly. This resulting > in code duplication across drivers. such as configuring a specific level > or find and apply an OPP based on a clock frequency. > > Introduce two new helper APIs, geni_se_set_perf_level() and > geni_se_set_perf_opp(), addresses this issue by providing a streamlined > method for the GENI Serial Engine (SE) drivers to find and set the OPP > based on the desired performance level, thereby eliminating redundancy. > > Signed-off-by: Praveen Talari > --- [...] > +/** > + * geni_se_set_perf_level() - Set performance level for GENI SE. > + * @se: Pointer to the struct geni_se instance. > + * @level: The desired performance level. > + * > + * Sets the performance level by directly calling dev_pm_opp_set_level > + * on the performance device associated with the SE. > + * > + * Return: 0 on success, or a negative error code on failure. > + */ > +int geni_se_set_perf_level(struct geni_se *se, unsigned long level) > +{ > + return dev_pm_opp_set_level(se->pd_list->pd_devs[DOMAIN_IDX_PERF], level); > +} > +EXPORT_SYMBOL_GPL(geni_se_set_perf_level); This function is never used > + > +/** > + * geni_se_set_perf_opp() - Set performance OPP for GENI SE by frequency. > + * @se: Pointer to the struct geni_se instance. > + * @clk_freq: The requested clock frequency. > + * > + * Finds the nearest operating performance point (OPP) for the given > + * clock frequency and applies it to the SE's performance device. > + * > + * Return: 0 on success, or a negative error code on failure. > + */ > +int geni_se_set_perf_opp(struct geni_se *se, unsigned long clk_freq) I think with the SPI driver in mind (which seems to do a simple rateset for both backends) we could do: > +{ > + struct device *perf_dev = se->pd_list->pd_devs[DOMAIN_IDX_PERF]; Then, we can do struct device * perf_dev = se->dev; if (se->pd_list && se->pd_list->pd_devs[DOMAIN_IDX_PERF]) perf_dev = se->pd_list->pd_devs[DOMAIN_IDX_PERF]; and reuse it in both cases, completely transparently to the caller Konrad