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[82.37.195.13]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-454917d57aesm3814079f8f.26.2026.05.08.04.25.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 04:25:31 -0700 (PDT) Date: Fri, 8 May 2026 12:25:28 +0100 From: Daniel Thompson To: Andrew Lunn Cc: Alex Elder , andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, maxime.chevallier@bootlin.com, rmk+kernel@armlinux.org.uk, andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linusw@kernel.org, brgl@kernel.org, arnd@arndb.de, gregkh@linuxfoundation.org, mohd.anwar@oss.qualcomm.com, a0987203069@gmail.com, alexandre.torgue@foss.st.com, ast@kernel.org, boon.khai.ng@altera.com, chenchuangyu@xiaomi.com, chenhuacai@kernel.org, daniel@iogearbox.net, hawk@kernel.org, hkallweit1@gmail.com, inochiama@gmail.com, john.fastabend@gmail.com, julianbraha@gmail.com, livelycarpet87@gmail.com, matthew.gerlach@altera.com, mcoquelin.stm32@gmail.com, me@ziyao.cc, prabhakar.mahadev-lad.rj@bp.renesas.com, richardcochran@gmail.com, rohan.g.thomas@altera.com, sdf@fomichev.me, siyanteng@cqsoftware.com.cn, weishangjuan@eswincomputing.com, wens@kernel.org, netdev@vger.kernel.org, bpf@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next 10/12] net: stmmac: tc956x: add TC956x/QPS615 support Message-ID: References: <20260501155421.3329862-1-elder@riscstar.com> <20260501155421.3329862-11-elder@riscstar.com> <2ce5897d-5bbb-486a-b0f0-0e30e54b451a@lunn.ch> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Thu, May 07, 2026 at 06:29:15PM +0200, Andrew Lunn wrote: > On Thu, May 07, 2026 at 05:03:46PM +0100, Daniel Thompson wrote: > > On Fri, May 01, 2026 at 09:04:58PM +0200, Andrew Lunn wrote: > > > > +static struct tc956x_mac_speed mac_speed[] = { > > > > + { PHY_INTERFACE_MODE_2500BASEX, SPEED_2500, SP_SEL_SGMII_2500M, }, > > > > + { PHY_INTERFACE_MODE_SGMII, SPEED_2500, SP_SEL_SGMII_2500M, }, > > > > + { PHY_INTERFACE_MODE_SGMII, SPEED_1000, SP_SEL_SGMII_1000M, }, > > > > > > That looks odd. Some vendors implemented 2500BaseX using SGMII > > > overclocked. But that is not strictly 2500BaseX. Having the 2500BASEX > > > entry suggests you have real 2500BASEX, so why have an SGMII entry > > > with SPEED_2500? > > > > This is a consequence of the code that uses this lookup table being > > called both during initialization and from the fix_mac_speed() callback. > > > > During initialization we only have the value in plat->phy_interface to > > go on so we run the lookup table using plat->phy_interface (which is > > typically PHY_INTERFACE_MODE_SGMII) and with the maximum permitted > > speed. > > Something sounds wrong here. SGMII only supports 10/100/1G. You should > never be asked to do SGMII at 2500. It should ask for 2500BaseX. We weren't being asked. It was just an internal driver trick to common up some code paths. However I did a few tests and the internal driver trick doesn't actually do much we can't achieve a different way. With that changed I can (and will) remove the PHY_INTERFACE_MODE_SGMII/SPEED_2500 entry from the table. > > I haven't got detailed enough notes to allow me to double check but I > > think there were problems completing the initial MAC reset if we didn't > > write something sensible to the hardware during initialization. > > > During fix_max_speed() we get told to adopt 2500base-x. Reviewing the > > code I can see we don't propagate that and just use > > plat->phy_interface for fix_mac_speed(). I will fix the code to that > > the requested interface propagates properly to the lookup table but I > > think we would still rely on the SGMII entry to get sane initial values > > to write to the hardware. > > Getting sane values into the hardware is good, but 2500 SGMII is not > sane :-( BTW if you are bothered by SP_SEL_SGMII_2500M, that name comes directly from the TRM and I'd prefer to keep it if I can. The enumerated value we have to write into the SP_SEL for 2500base-X is "SGMII 2500M". Daniel.