From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 77DDAC11F64 for ; Thu, 1 Jul 2021 16:43:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5258A613D6 for ; Thu, 1 Jul 2021 16:43:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229873AbhGAQqK (ORCPT ); Thu, 1 Jul 2021 12:46:10 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:14630 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229759AbhGAQqK (ORCPT ); Thu, 1 Jul 2021 12:46:10 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1625157820; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=GNTkVXpdVkSQKI0mqru1ysaJCUJY+h+yturbnm9LQHo=; b=cwZj0p8aZmqjVzu+l8KTfu+CJ0TDs+hKMVpGjiJ8xcEjPPxm6R5NPAvaHK4OZo+I0gkBP18V crrwMFBQVy6Y8loy4BdGfu1TJrls2wAiujDme2qadVC+S4EsCBDSba/ymq0tL4keOvUBNq7+ jGKPrtSUYJTxq8/5DJwfyrnye1U= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n01.prod.us-east-1.postgun.com with SMTP id 60ddf0aeec0b18a7452c01a6 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Thu, 01 Jul 2021 16:43:26 GMT Sender: abhinavk=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id B80A1C43217; Thu, 1 Jul 2021 16:43:25 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: abhinavk) by smtp.codeaurora.org (Postfix) with ESMTPSA id A5984C4338A; Thu, 1 Jul 2021 16:43:24 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Thu, 01 Jul 2021 09:43:24 -0700 From: abhinavk@codeaurora.org To: Dmitry Baryshkov Cc: Bjorn Andersson , Rob Clark , Sean Paul , Jonathan Marek , Stephen Boyd , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, David Airlie , Daniel Vetter , freedreno@lists.freedesktop.org Subject: Re: [Freedreno] [PATCH] drm/msm/dsi: drop gdsc regulator handling In-Reply-To: <20210701000015.3347713-1-dmitry.baryshkov@linaro.org> References: <20210701000015.3347713-1-dmitry.baryshkov@linaro.org> Message-ID: X-Sender: abhinavk@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 2021-06-30 17:00, Dmitry Baryshkov wrote: > None of supported devies uses "gdsc" regulator for DSI. GDSC support is > now implemented as a power domain. Drop old code and config handling > gdsc regulator requesting and enabling. > > Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar > --- > drivers/gpu/drm/msm/dsi/dsi_cfg.c | 12 ++++-------- > drivers/gpu/drm/msm/dsi/dsi_host.c | 22 +++------------------- > 2 files changed, 7 insertions(+), 27 deletions(-) > > diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c > b/drivers/gpu/drm/msm/dsi/dsi_cfg.c > index f3f1c03c7db9..32c37d7c2109 100644 > --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c > +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c > @@ -32,9 +32,8 @@ static const char * const dsi_6g_bus_clk_names[] = { > static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = { > .io_offset = DSI_6G_REG_SHIFT, > .reg_cfg = { > - .num = 4, > + .num = 3, > .regs = { > - {"gdsc", -1, -1}, > {"vdd", 150000, 100}, /* 3.0 V */ > {"vdda", 100000, 100}, /* 1.2 V */ > {"vddio", 100000, 100}, /* 1.8 V */ > @@ -53,9 +52,8 @@ static const char * const dsi_8916_bus_clk_names[] = > { > static const struct msm_dsi_config msm8916_dsi_cfg = { > .io_offset = DSI_6G_REG_SHIFT, > .reg_cfg = { > - .num = 3, > + .num = 2, > .regs = { > - {"gdsc", -1, -1}, > {"vdda", 100000, 100}, /* 1.2 V */ > {"vddio", 100000, 100}, /* 1.8 V */ > }, > @@ -73,9 +71,8 @@ static const char * const dsi_8976_bus_clk_names[] = > { > static const struct msm_dsi_config msm8976_dsi_cfg = { > .io_offset = DSI_6G_REG_SHIFT, > .reg_cfg = { > - .num = 3, > + .num = 2, > .regs = { > - {"gdsc", -1, -1}, > {"vdda", 100000, 100}, /* 1.2 V */ > {"vddio", 100000, 100}, /* 1.8 V */ > }, > @@ -89,9 +86,8 @@ static const struct msm_dsi_config msm8976_dsi_cfg = > { > static const struct msm_dsi_config msm8994_dsi_cfg = { > .io_offset = DSI_6G_REG_SHIFT, > .reg_cfg = { > - .num = 7, > + .num = 6, > .regs = { > - {"gdsc", -1, -1}, > {"vdda", 100000, 100}, /* 1.25 V */ > {"vddio", 100000, 100}, /* 1.8 V */ > {"vcca", 10000, 100}, /* 1.0 V */ > diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c > b/drivers/gpu/drm/msm/dsi/dsi_host.c > index ed504fe5074f..66c425d4159c 100644 > --- a/drivers/gpu/drm/msm/dsi/dsi_host.c > +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c > @@ -203,35 +203,22 @@ static const struct msm_dsi_cfg_handler > *dsi_get_config( > { > const struct msm_dsi_cfg_handler *cfg_hnd = NULL; > struct device *dev = &msm_host->pdev->dev; > - struct regulator *gdsc_reg; > struct clk *ahb_clk; > int ret; > u32 major = 0, minor = 0; > > - gdsc_reg = regulator_get(dev, "gdsc"); > - if (IS_ERR(gdsc_reg)) { > - pr_err("%s: cannot get gdsc\n", __func__); > - goto exit; > - } > - > ahb_clk = msm_clk_get(msm_host->pdev, "iface"); > if (IS_ERR(ahb_clk)) { > pr_err("%s: cannot get interface clock\n", __func__); > - goto put_gdsc; > + goto exit; > } > > pm_runtime_get_sync(dev); > > - ret = regulator_enable(gdsc_reg); > - if (ret) { > - pr_err("%s: unable to enable gdsc\n", __func__); > - goto put_gdsc; > - } > - > ret = clk_prepare_enable(ahb_clk); > if (ret) { > pr_err("%s: unable to enable ahb_clk\n", __func__); > - goto disable_gdsc; > + goto runtime_put; > } > > ret = dsi_get_version(msm_host->ctrl_base, &major, &minor); > @@ -246,11 +233,8 @@ static const struct msm_dsi_cfg_handler > *dsi_get_config( > > disable_clks: > clk_disable_unprepare(ahb_clk); > -disable_gdsc: > - regulator_disable(gdsc_reg); > +runtime_put: > pm_runtime_put_sync(dev); > -put_gdsc: > - regulator_put(gdsc_reg); > exit: > return cfg_hnd; > }