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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Varadarajan Narayanan <quic_varada@quicinc.com>,
	andersson@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	konradybcio@kernel.org, rafael@kernel.org,
	viresh.kumar@linaro.org, ilia.lin@kernel.org, djakov@kernel.org,
	quic_srichara@quicinc.com, quic_mdalam@quicinc.com,
	linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pm@vger.kernel.org
Subject: Re: [PATCH v4 4/4] arm64: dts: qcom: ipq5424: Enable cpufreq
Date: Wed, 30 Jul 2025 14:49:58 +0200	[thread overview]
Message-ID: <b51305cd-0e4f-49f9-adc1-fbe83b539e98@oss.qualcomm.com> (raw)
In-Reply-To: <20250730081316.547796-5-quic_varada@quicinc.com>

On 7/30/25 10:13 AM, Varadarajan Narayanan wrote:
> From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
> 
> Add the qfprom, cpu clocks, A53 PLL and cpu-opp-table required for
> CPU clock scaling.
> 
> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
> [ Added interconnect related entries, fix dt-bindings errors ]
> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> ---

[...]

> +	cpu_opp_table: opp-table-cpu {
> +		compatible = "operating-points-v2-kryo-cpu";
> +		opp-shared;
> +		nvmem-cells = <&cpu_speed_bin>;
> +
> +		opp-1416000000 {

These rates seem quite high, are there no lower fstates for idling?

> +			opp-hz = /bits/ 64 <1416000000>;
> +			opp-microvolt = <1>;
> +			opp-supported-hw = <0x3>;
> +			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <984000>;
> +		};
> +
> +		opp-1800000000 {
> +			opp-hz = /bits/ 64 <1800000000>;
> +			opp-microvolt = <2>;
> +			opp-supported-hw = <0x1>;
> +			clock-latency-ns = <200000>;
> +			opp-peak-kBps = <1272000>;
> +		};
> +	};
> +
>  	memory@80000000 {
>  		device_type = "memory";
>  		/* We expect the bootloader to fill in the size */
> @@ -388,6 +428,18 @@ system-cache-controller@800000 {
>  			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
>  		};
>  
> +		qfprom@a6000 {
> +			compatible = "qcom,ipq5424-qfprom", "qcom,qfprom";
> +			reg = <0x0 0x000a6000 0x0 0x1000>;

The block is a bit bigger

On IPQ platforms, can the OS blow fuses directly without TZ
interference?

> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +
> +			cpu_speed_bin: cpu-speed-bin@234 {
> +				reg = <0x234 0x1>;
> +				bits = <0 8>;
> +			};
> +		};
> +
>  		tlmm: pinctrl@1000000 {
>  			compatible = "qcom,ipq5424-tlmm";
>  			reg = <0 0x01000000 0 0x300000>;
> @@ -730,6 +782,15 @@ frame@f42d000 {
>  			};
>  		};
>  
> +		apss_clk: clock@fa80000 {
> +			compatible = "qcom,ipq5424-apss-clk";
> +			reg = <0x0 0x0fa80000 0x0 0x20000>;

Let's make it 0x30_000 to reserve the actual carved out reg space
> +			clocks = <&xo_board>, <&gcc GPLL0>;
> +			clock-names = "xo", "clk_ref";

1 per line would be perfect

Konrad

  reply	other threads:[~2025-07-30 12:50 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-30  8:13 [PATCH v4 0/4] Enable cpufreq for IPQ5424 Varadarajan Narayanan
2025-07-30  8:13 ` [PATCH v4 1/4] dt-bindings: clock: ipq5424-apss-clk: Add ipq5424 apss clock controller Varadarajan Narayanan
2025-07-30  9:02   ` Krzysztof Kozlowski
2025-07-30  9:22     ` Sricharan Ramabadhran
2025-07-30  9:36       ` Krzysztof Kozlowski
2025-07-30 10:32         ` Sricharan Ramabadhran
2025-08-01  5:58     ` Md Sadre Alam
2025-07-30  8:13 ` [PATCH v4 2/4] clk: qcom: apss-ipq5424: " Varadarajan Narayanan
2025-07-30  9:39   ` Konrad Dybcio
2025-07-30  8:13 ` [PATCH v4 3/4] cpufreq: qcom-nvmem: Enable cpufreq for ipq5424 Varadarajan Narayanan
2025-07-30  8:28   ` Viresh Kumar
2025-07-30  8:38     ` Konrad Dybcio
2025-07-30  8:13 ` [PATCH v4 4/4] arm64: dts: qcom: ipq5424: Enable cpufreq Varadarajan Narayanan
2025-07-30 12:49   ` Konrad Dybcio [this message]
2025-07-31  8:20     ` Varadarajan Narayanan

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