From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5AFB2C5519F for ; Wed, 25 Nov 2020 06:58:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EC92620715 for ; Wed, 25 Nov 2020 06:58:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="FOfqJP/E" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726314AbgKYG6e (ORCPT ); Wed, 25 Nov 2020 01:58:34 -0500 Received: from z5.mailgun.us ([104.130.96.5]:23702 "EHLO z5.mailgun.us" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725836AbgKYG6d (ORCPT ); Wed, 25 Nov 2020 01:58:33 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1606287513; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=LrICIdDLfpZKH7ljsAEC0wOYB0ntNG1+5ilRwexAuoU=; b=FOfqJP/EdNWNOYeDBleiWzlzDQo5vZwSmYrXfKmNAdg8jPVGuha5Q3Xa7BDg1mWJV6BSdHsC OOoJlQk/ml8H+/DDN9R3Td8Ng6s/3OkPhXn5dIzlb+4Pgy7G+RBOu83e6eI+1ENUDTzCGwBf KCWW0gZ2kSwS4UQJG+XtGuW2uUQ= X-Mailgun-Sending-Ip: 104.130.96.5 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n04.prod.us-west-2.postgun.com with SMTP id 5fbe008c22377520eeda0294 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Wed, 25 Nov 2020 06:58:20 GMT Sender: saiprakash.ranjan=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id E679AC43468; Wed, 25 Nov 2020 06:58:19 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id 03716C433C6; Wed, 25 Nov 2020 06:58:18 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Wed, 25 Nov 2020 12:28:18 +0530 From: Sai Prakash Ranjan To: Will Deacon Cc: Robin Murphy , Joerg Roedel , Jordan Crouse , Rob Clark , Akhil P Oommen , freedreno@lists.freedesktop.org, "Kristian H . Kristensen" , dri-devel@lists.freedesktop.org, iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: Re: [PATCHv9 2/8] iommu/arm-smmu: Add domain attribute for pagetable configuration In-Reply-To: <20201124214134.GB14252@willie-the-truck> References: <122e7b3050c51ee2e3637fca0b3967b4c3dc2bac.1606150259.git.saiprakash.ranjan@codeaurora.org> <20201124214134.GB14252@willie-the-truck> Message-ID: X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 2020-11-25 03:11, Will Deacon wrote: > On Mon, Nov 23, 2020 at 10:35:55PM +0530, Sai Prakash Ranjan wrote: >> Add iommu domain attribute for pagetable configuration which >> initially will be used to set quirks like for system cache aka >> last level cache to be used by client drivers like GPU to set >> right attributes for caching the hardware pagetables into the >> system cache and later can be extended to include other page >> table configuration data. >> >> Signed-off-by: Sai Prakash Ranjan >> --- >> drivers/iommu/arm/arm-smmu/arm-smmu.c | 20 ++++++++++++++++++++ >> drivers/iommu/arm/arm-smmu/arm-smmu.h | 1 + >> include/linux/io-pgtable.h | 4 ++++ >> include/linux/iommu.h | 1 + >> 4 files changed, 26 insertions(+) > > Given that we're heading for a v10 to address my comments on patch 3, > then I guess you may as well split this into two patches so that I can > share just the atttibute with Rob rather than the driver parts. > > Please keep it all as one series though, with the common parts at the > beginning, and I'll figure it out. > Ok I will split up and send v10. Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation