Re: Disconnect interrupt generation for QC targets when role switch is enabled

[Krishna Kurapati PSSNV <quic_kriskura@quicinc.com>]

On 8/29/2023 6:42 PM, Krishna Kurapati PSSNV wrote:
> 
> 
> On 8/16/2023 10:24 PM, Manivannan Sadhasivam wrote:
>>
>> Since you have quoted my series, I'd like to get clarification on one 
>> issue I'm
>> seeing. When resuming from runtime suspend in host mode, dwc3-qcom 
>> driver gets
>> the wakeup event and it resumes the xhci driver. But the XHCI IRQs are 
>> received
>> after some delay. Due to this, xhci driver doesn't resume the device, 
>> instead,
>> all the drivers (dwc3-qcom, dwc3-core, xhci) went to runtime suspend 
>> again.
>>
>> But once the XHCI IRQs are received, dwc3-qcom gets the wakeup event 
>> and this
>> time, xhci driver resumes the device.
>>
>> This is the reason why I added the autosuspend delay of 200ms to allow 
>> the xhci
>> driver to wait for IRQs before going to runtime suspend.
>>
>> Can you clarify why there is a delay in receiving XHCI IRQs?
>>
> 
> Hi Manivannan,
> 
>   Apologies for the delay in response. Can you help check if the phy 
> clocks are ON at the instant we see that the xhci irq not coming up. I 
> got to know that after resume, the clocks need to be ON for phy for it 
> to signal the controller which would then generate the xhci irq. I also 
> see that in resume_irq call in dwc3-qcom, we call runtime_resume for 
> xhci->dev, probably causing it to resume before dwc3->dev (I might be 
> wrong though). Can you confirm if the clocks for phy and GDSC for 
> controller are ON when this issue is seen. Also can you let know how 
> much time its taking for the xhci irq to be generated after resume.
> 
Hi Manivannan,

  Sorry for reviving an old thread. Can you help check whether 
autosuspend is being triggered by pm framework before run_stop bit is 
cleared as part of xhci_suspend in your case ?

I am trying to repro the issue, but I am seeing a different error, "host 
controller error"

Regards,
Krishna,