[PATCH 0/5] arm64: dts: qcom: misc DT bindings check fixes

[PATCH 0/5] arm64: dts: qcom: misc DT bindings check fixes

[Neil Armstrong]

Here's a set of DT bindings check fixes

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
Neil Armstrong (5):
      arm64: dts: qcom: qcm6490-shift-otter: remove invalid orientation-switch
      arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: fix ov7251 lane properties
      arm64: dts: qcom: sc7180-trogdor-quackingstick: add missing avee-supply
      arm64: dts: qcom: sc7180-trogdor-pompom: rename 5v-choke thermal zone
      arm64: dts: qcom: sc7180: fix psci power domain node names

 arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts       |  2 --
 arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi    |  4 ++--
 .../boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi    |  1 +
 arch/arm64/boot/dts/qcom/sc7180.dtsi                   | 18 +++++++++---------
 .../dts/qcom/sdm845-db845c-navigation-mezzanine.dtso   |  3 ++-
 5 files changed, 14 insertions(+), 14 deletions(-)
---
base-commit: c245a7a79602ccbee780c004c1e4abcda66aec32
change-id: 20241204-topic-misc-dt-fixes-6468da97a4cb

Best regards,
-- 
Neil Armstrong <neil.armstrong@linaro.org>

[PATCH 1/5] arm64: dts: qcom: qcm6490-shift-otter: remove invalid orientation-switch

[Neil Armstrong]

The orientation-switch property is not documented in the PHY bindings,
remove it.

This fixes:
qcm6490-shift-otter.dts: phy@88e3000: 'orientation-switch' does not match any of the regexes: 'pinctrl-[0-9]+'
	from schema $id: http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts b/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts
index 4667e47a74bc5b0f01a53beb49993d238b13c4ea..75930f95769663f6ac3e2dd0c5f7d224085dda40 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts
@@ -942,8 +942,6 @@ &usb_1_hsphy {
 
 	qcom,squelch-detector-bp = <(-2090)>;
 
-	orientation-switch;
-
 	status = "okay";
 };
 

-- 
2.34.1

Re: [PATCH 1/5] arm64: dts: qcom: qcm6490-shift-otter: remove invalid orientation-switch

[Dmitry Baryshkov]

On Wed, Dec 04, 2024 at 11:56:53AM +0100, Neil Armstrong wrote:
> The orientation-switch property is not documented in the PHY bindings,
> remove it.
> 
> This fixes:
> qcm6490-shift-otter.dts: phy@88e3000: 'orientation-switch' does not match any of the regexes: 'pinctrl-[0-9]+'
> 	from schema $id: http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts | 2 --
>  1 file changed, 2 deletions(-)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

-- 
With best wishes
Dmitry

[PATCH 2/5] arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: fix ov7251 lane properties

[Neil Armstrong]

Bindings documents data-lanes as a single entry with a separate
clock-lanes property, but DT uses 2 entries in data-lanes.

This would suggest clock-lanes is missing, fix the DT using the
bindings example.

This fixes:
sdm845-db845c-navigation-mezzanine.dtso: camera@60: port:endpoint:data-lanes: [0, 1] is too long
	from schema $id: http://devicetree.org/schemas/media/i2c/ovti,ov7251.yaml#

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
index 0a87df806cafc8e726aacc07a772ca478d0ee3df..5a16f4c2b346b314af3d614266e1ca034057e643 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
+++ b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
@@ -115,7 +115,8 @@ camera@60 {
 
 		port {
 			ov7251_ep: endpoint {
-				data-lanes = <0 1>;
+				clock-lanes = <1>;
+				data-lanes = <0>;
 /*				remote-endpoint = <&csiphy3_ep>; */
 			};
 		};

-- 
2.34.1

Re: [PATCH 2/5] arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: fix ov7251 lane properties

[Dmitry Baryshkov]

On Wed, Dec 04, 2024 at 11:56:54AM +0100, Neil Armstrong wrote:
> Bindings documents data-lanes as a single entry with a separate
> clock-lanes property, but DT uses 2 entries in data-lanes.
> 
> This would suggest clock-lanes is missing, fix the DT using the
> bindings example.
> 
> This fixes:
> sdm845-db845c-navigation-mezzanine.dtso: camera@60: port:endpoint:data-lanes: [0, 1] is too long
> 	from schema $id: http://devicetree.org/schemas/media/i2c/ovti,ov7251.yaml#
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
> index 0a87df806cafc8e726aacc07a772ca478d0ee3df..5a16f4c2b346b314af3d614266e1ca034057e643 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
> +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
> @@ -115,7 +115,8 @@ camera@60 {
>  
>  		port {
>  			ov7251_ep: endpoint {
> -				data-lanes = <0 1>;
> +				clock-lanes = <1>;
> +				data-lanes = <0>;

Is it really this way or the other way around, clock = <0>, data = <1>?

>  /*				remote-endpoint = <&csiphy3_ep>; */
>  			};
>  		};
> 
> -- 
> 2.34.1
> 

-- 
With best wishes
Dmitry

Re: [PATCH 2/5] arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: fix ov7251 lane properties

[Neil Armstrong]

On 04/12/2024 12:05, Dmitry Baryshkov wrote:
> On Wed, Dec 04, 2024 at 11:56:54AM +0100, Neil Armstrong wrote:
>> Bindings documents data-lanes as a single entry with a separate
>> clock-lanes property, but DT uses 2 entries in data-lanes.
>>
>> This would suggest clock-lanes is missing, fix the DT using the
>> bindings example.
>>
>> This fixes:
>> sdm845-db845c-navigation-mezzanine.dtso: camera@60: port:endpoint:data-lanes: [0, 1] is too long
>> 	from schema $id: http://devicetree.org/schemas/media/i2c/ovti,ov7251.yaml#
>>
>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>> ---
>>   arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso | 3 ++-
>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>> index 0a87df806cafc8e726aacc07a772ca478d0ee3df..5a16f4c2b346b314af3d614266e1ca034057e643 100644
>> --- a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>> +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>> @@ -115,7 +115,8 @@ camera@60 {
>>   
>>   		port {
>>   			ov7251_ep: endpoint {
>> -				data-lanes = <0 1>;
>> +				clock-lanes = <1>;
>> +				data-lanes = <0>;
> 
> Is it really this way or the other way around, clock = <0>, data = <1>?

No idea actually, on the schematics the lanes from the DB845 are :

CSI0_P/N -> OV7251_CSI3_LANE0_P/N -> MIPI_CSI3_LANE0_P -> SoC
and
CLKP/N -> OV7251_CSI3_CLK_P/N -> MIPI_CSI3_CLK_P/N -> SoC

So I assume the data-lane is 0, for clock-lane I just used
the example, but I found nothing in the code using those assignments

Neil

> 
>>   /*				remote-endpoint = <&csiphy3_ep>; */
>>   			};
>>   		};
>>
>> -- 
>> 2.34.1
>>
> 

Re: [PATCH 2/5] arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: fix ov7251 lane properties

[Vladimir Zapolskiy]

On 12/4/24 14:16, Neil Armstrong wrote:
> On 04/12/2024 12:05, Dmitry Baryshkov wrote:
>> On Wed, Dec 04, 2024 at 11:56:54AM +0100, Neil Armstrong wrote:
>>> Bindings documents data-lanes as a single entry with a separate
>>> clock-lanes property, but DT uses 2 entries in data-lanes.
>>>
>>> This would suggest clock-lanes is missing, fix the DT using the
>>> bindings example.
>>>
>>> This fixes:
>>> sdm845-db845c-navigation-mezzanine.dtso: camera@60: port:endpoint:data-lanes: [0, 1] is too long
>>> 	from schema $id: http://devicetree.org/schemas/media/i2c/ovti,ov7251.yaml#
>>>
>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>>> ---
>>>    arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso | 3 ++-
>>>    1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>>> index 0a87df806cafc8e726aacc07a772ca478d0ee3df..5a16f4c2b346b314af3d614266e1ca034057e643 100644
>>> --- a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>>> +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>>> @@ -115,7 +115,8 @@ camera@60 {
>>>    
>>>    		port {
>>>    			ov7251_ep: endpoint {
>>> -				data-lanes = <0 1>;
>>> +				clock-lanes = <1>;
>>> +				data-lanes = <0>;
>>
>> Is it really this way or the other way around, clock = <0>, data = <1>?
> 
> No idea actually, on the schematics the lanes from the DB845 are :
> 
> CSI0_P/N -> OV7251_CSI3_LANE0_P/N -> MIPI_CSI3_LANE0_P -> SoC
> and
> CLKP/N -> OV7251_CSI3_CLK_P/N -> MIPI_CSI3_CLK_P/N -> SoC
> 
> So I assume the data-lane is 0, for clock-lane I just used
> the example, but I found nothing in the code using those assignments
> 

It's a sensor property, and OV7251 sensor has the non-selectable clock lane.

If it's technically acceptable, I would rather suggest to deprecate and
remove "clock-lanes" property and hard-code "data-lanes" value to <1>.

By the way, this particular device tree bindings miss bus-type property,
it could be either MIPI or LVDS serial output.

--
Best wishes,
Vladimir

Re: [PATCH 2/5] arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: fix ov7251 lane properties

[neil.armstrong]

On 04/12/2024 14:10, Vladimir Zapolskiy wrote:
> On 12/4/24 14:16, Neil Armstrong wrote:
>> On 04/12/2024 12:05, Dmitry Baryshkov wrote:
>>> On Wed, Dec 04, 2024 at 11:56:54AM +0100, Neil Armstrong wrote:
>>>> Bindings documents data-lanes as a single entry with a separate
>>>> clock-lanes property, but DT uses 2 entries in data-lanes.
>>>>
>>>> This would suggest clock-lanes is missing, fix the DT using the
>>>> bindings example.
>>>>
>>>> This fixes:
>>>> sdm845-db845c-navigation-mezzanine.dtso: camera@60: port:endpoint:data-lanes: [0, 1] is too long
>>>>     from schema $id: http://devicetree.org/schemas/media/i2c/ovti,ov7251.yaml#
>>>>
>>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>>>> ---
>>>>    arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso | 3 ++-
>>>>    1 file changed, 2 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>>>> index 0a87df806cafc8e726aacc07a772ca478d0ee3df..5a16f4c2b346b314af3d614266e1ca034057e643 100644
>>>> --- a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>>>> +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>>>> @@ -115,7 +115,8 @@ camera@60 {
>>>>            port {
>>>>                ov7251_ep: endpoint {
>>>> -                data-lanes = <0 1>;
>>>> +                clock-lanes = <1>;
>>>> +                data-lanes = <0>;
>>>
>>> Is it really this way or the other way around, clock = <0>, data = <1>?
>>
>> No idea actually, on the schematics the lanes from the DB845 are :
>>
>> CSI0_P/N -> OV7251_CSI3_LANE0_P/N -> MIPI_CSI3_LANE0_P -> SoC
>> and
>> CLKP/N -> OV7251_CSI3_CLK_P/N -> MIPI_CSI3_CLK_P/N -> SoC
>>
>> So I assume the data-lane is 0, for clock-lane I just used
>> the example, but I found nothing in the code using those assignments
>>
> 
> It's a sensor property, and OV7251 sensor has the non-selectable clock lane.
> 
> If it's technically acceptable, I would rather suggest to deprecate and
> remove "clock-lanes" property and hard-code "data-lanes" value to <1>.


Ok indeed while looking at the OV7251 sensor datasheet, there's a single
fixed data lane and a single fixed clock lane, so on the sensor side we
can't select anything but how would we define lane0 is used on the SoC side ?

> 
> By the way, this particular device tree bindings miss bus-type property,
> it could be either MIPI or LVDS serial output.
> 
> -- 
> Best wishes,
> Vladimir

Re: [PATCH 2/5] arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: fix ov7251 lane properties

[Vladimir Zapolskiy]

On 12/4/24 15:16, neil.armstrong@linaro.org wrote:
> On 04/12/2024 14:10, Vladimir Zapolskiy wrote:
>> On 12/4/24 14:16, Neil Armstrong wrote:
>>> On 04/12/2024 12:05, Dmitry Baryshkov wrote:
>>>> On Wed, Dec 04, 2024 at 11:56:54AM +0100, Neil Armstrong wrote:
>>>>> Bindings documents data-lanes as a single entry with a separate
>>>>> clock-lanes property, but DT uses 2 entries in data-lanes.
>>>>>
>>>>> This would suggest clock-lanes is missing, fix the DT using the
>>>>> bindings example.
>>>>>
>>>>> This fixes:
>>>>> sdm845-db845c-navigation-mezzanine.dtso: camera@60: port:endpoint:data-lanes: [0, 1] is too long
>>>>>      from schema $id: http://devicetree.org/schemas/media/i2c/ovti,ov7251.yaml#
>>>>>
>>>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>>>>> ---
>>>>>     arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso | 3 ++-
>>>>>     1 file changed, 2 insertions(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>>>>> index 0a87df806cafc8e726aacc07a772ca478d0ee3df..5a16f4c2b346b314af3d614266e1ca034057e643 100644
>>>>> --- a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>>>>> +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>>>>> @@ -115,7 +115,8 @@ camera@60 {
>>>>>             port {
>>>>>                 ov7251_ep: endpoint {
>>>>> -                data-lanes = <0 1>;
>>>>> +                clock-lanes = <1>;
>>>>> +                data-lanes = <0>;
>>>>
>>>> Is it really this way or the other way around, clock = <0>, data = <1>?
>>>
>>> No idea actually, on the schematics the lanes from the DB845 are :
>>>
>>> CSI0_P/N -> OV7251_CSI3_LANE0_P/N -> MIPI_CSI3_LANE0_P -> SoC
>>> and
>>> CLKP/N -> OV7251_CSI3_CLK_P/N -> MIPI_CSI3_CLK_P/N -> SoC
>>>
>>> So I assume the data-lane is 0, for clock-lane I just used
>>> the example, but I found nothing in the code using those assignments
>>>
>>
>> It's a sensor property, and OV7251 sensor has the non-selectable clock lane.
>>
>> If it's technically acceptable, I would rather suggest to deprecate and
>> remove "clock-lanes" property and hard-code "data-lanes" value to <1>.
> 
> 
> Ok indeed while looking at the OV7251 sensor datasheet, there's a single
> fixed data lane and a single fixed clock lane, so on the sensor side we
> can't select anything but how would we define lane0 is used on the SoC side ?

It's done right in the common way, there are clock-lanes and data-lanes
properties on the ISP endpoint side.

>>
>> By the way, this particular device tree bindings miss bus-type property,
>> it could be either MIPI or LVDS serial output.
>>

-- 
Best wishes,
Vladimir

Re: [PATCH 2/5] arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: fix ov7251 lane properties

[neil.armstrong]

On 04/12/2024 14:30, Vladimir Zapolskiy wrote:
> On 12/4/24 15:16, neil.armstrong@linaro.org wrote:
>> On 04/12/2024 14:10, Vladimir Zapolskiy wrote:
>>> On 12/4/24 14:16, Neil Armstrong wrote:
>>>> On 04/12/2024 12:05, Dmitry Baryshkov wrote:
>>>>> On Wed, Dec 04, 2024 at 11:56:54AM +0100, Neil Armstrong wrote:
>>>>>> Bindings documents data-lanes as a single entry with a separate
>>>>>> clock-lanes property, but DT uses 2 entries in data-lanes.
>>>>>>
>>>>>> This would suggest clock-lanes is missing, fix the DT using the
>>>>>> bindings example.
>>>>>>
>>>>>> This fixes:
>>>>>> sdm845-db845c-navigation-mezzanine.dtso: camera@60: port:endpoint:data-lanes: [0, 1] is too long
>>>>>>      from schema $id: http://devicetree.org/schemas/media/i2c/ovti,ov7251.yaml#
>>>>>>
>>>>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>>>>>> ---
>>>>>>     arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso | 3 ++-
>>>>>>     1 file changed, 2 insertions(+), 1 deletion(-)
>>>>>>
>>>>>> diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>>>>>> index 0a87df806cafc8e726aacc07a772ca478d0ee3df..5a16f4c2b346b314af3d614266e1ca034057e643 100644
>>>>>> --- a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>>>>>> +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>>>>>> @@ -115,7 +115,8 @@ camera@60 {
>>>>>>             port {
>>>>>>                 ov7251_ep: endpoint {
>>>>>> -                data-lanes = <0 1>;
>>>>>> +                clock-lanes = <1>;
>>>>>> +                data-lanes = <0>;
>>>>>
>>>>> Is it really this way or the other way around, clock = <0>, data = <1>?
>>>>
>>>> No idea actually, on the schematics the lanes from the DB845 are :
>>>>
>>>> CSI0_P/N -> OV7251_CSI3_LANE0_P/N -> MIPI_CSI3_LANE0_P -> SoC
>>>> and
>>>> CLKP/N -> OV7251_CSI3_CLK_P/N -> MIPI_CSI3_CLK_P/N -> SoC
>>>>
>>>> So I assume the data-lane is 0, for clock-lane I just used
>>>> the example, but I found nothing in the code using those assignments
>>>>
>>>
>>> It's a sensor property, and OV7251 sensor has the non-selectable clock lane.
>>>
>>> If it's technically acceptable, I would rather suggest to deprecate and
>>> remove "clock-lanes" property and hard-code "data-lanes" value to <1>.
>>
>>
>> Ok indeed while looking at the OV7251 sensor datasheet, there's a single
>> fixed data lane and a single fixed clock lane, so on the sensor side we
>> can't select anything but how would we define lane0 is used on the SoC side ?
> 
> It's done right in the common way, there are clock-lanes and data-lanes
> properties on the ISP endpoint side.

For the ov8856 yes, but in the current state the ov7251 endpoint is not
connected to the csiphy3, so it's currently not usable and disabled,
so I'd rather remove this node completely instead of fixing an
untestable dtso.

Neil

> 
>>>
>>> By the way, this particular device tree bindings miss bus-type property,
>>> it could be either MIPI or LVDS serial output.
>>>
> 

Re: [PATCH 2/5] arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: fix ov7251 lane properties

[Vladimir Zapolskiy]

On 12/5/24 11:27, neil.armstrong@linaro.org wrote:
> On 04/12/2024 14:30, Vladimir Zapolskiy wrote:
>> On 12/4/24 15:16, neil.armstrong@linaro.org wrote:
>>> On 04/12/2024 14:10, Vladimir Zapolskiy wrote:
>>>> On 12/4/24 14:16, Neil Armstrong wrote:
>>>>> On 04/12/2024 12:05, Dmitry Baryshkov wrote:
>>>>>> On Wed, Dec 04, 2024 at 11:56:54AM +0100, Neil Armstrong wrote:
>>>>>>> Bindings documents data-lanes as a single entry with a separate
>>>>>>> clock-lanes property, but DT uses 2 entries in data-lanes.
>>>>>>>
>>>>>>> This would suggest clock-lanes is missing, fix the DT using the
>>>>>>> bindings example.
>>>>>>>
>>>>>>> This fixes:
>>>>>>> sdm845-db845c-navigation-mezzanine.dtso: camera@60: port:endpoint:data-lanes: [0, 1] is too long
>>>>>>>       from schema $id: http://devicetree.org/schemas/media/i2c/ovti,ov7251.yaml#
>>>>>>>
>>>>>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>>>>>>> ---
>>>>>>>      arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso | 3 ++-
>>>>>>>      1 file changed, 2 insertions(+), 1 deletion(-)
>>>>>>>
>>>>>>> diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>>>>>>> index 0a87df806cafc8e726aacc07a772ca478d0ee3df..5a16f4c2b346b314af3d614266e1ca034057e643 100644
>>>>>>> --- a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>>>>>>> +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso
>>>>>>> @@ -115,7 +115,8 @@ camera@60 {
>>>>>>>              port {
>>>>>>>                  ov7251_ep: endpoint {
>>>>>>> -                data-lanes = <0 1>;
>>>>>>> +                clock-lanes = <1>;
>>>>>>> +                data-lanes = <0>;
>>>>>>
>>>>>> Is it really this way or the other way around, clock = <0>, data = <1>?
>>>>>
>>>>> No idea actually, on the schematics the lanes from the DB845 are :
>>>>>
>>>>> CSI0_P/N -> OV7251_CSI3_LANE0_P/N -> MIPI_CSI3_LANE0_P -> SoC
>>>>> and
>>>>> CLKP/N -> OV7251_CSI3_CLK_P/N -> MIPI_CSI3_CLK_P/N -> SoC
>>>>>
>>>>> So I assume the data-lane is 0, for clock-lane I just used
>>>>> the example, but I found nothing in the code using those assignments
>>>>>
>>>>
>>>> It's a sensor property, and OV7251 sensor has the non-selectable clock lane.
>>>>
>>>> If it's technically acceptable, I would rather suggest to deprecate and
>>>> remove "clock-lanes" property and hard-code "data-lanes" value to <1>.
>>>
>>>
>>> Ok indeed while looking at the OV7251 sensor datasheet, there's a single
>>> fixed data lane and a single fixed clock lane, so on the sensor side we
>>> can't select anything but how would we define lane0 is used on the SoC side ?
>>
>> It's done right in the common way, there are clock-lanes and data-lanes
>> properties on the ISP endpoint side.
> 
> For the ov8856 yes, but in the current state the ov7251 endpoint is not

Above I gave a generic description of describing the lanes.

> connected to the csiphy3, so it's currently not usable and disabled,
> so I'd rather remove this node completely instead of fixing an
> untestable dtso.

Sure, if the device is unused, it shall be removed.

--
Best wishes,
Vladimir

[PATCH 3/5] arm64: dts: qcom: sc7180-trogdor-quackingstick: add missing avee-supply

[Neil Armstrong]

The bindings requires the avee-supply, use the same regulator as
the avdd (positive voltage) which would also provide the negative
voltage by definition.

The fixes:
sc7180-trogdor-quackingstick-r0.dts: panel@0: 'avee-supply' is a required property
	from schema $id: http://devicetree.org/schemas/display/panel/boe,tv101wum-nl6.yaml#

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi
index 00229b1515e60505f15fd58c6e7f16dcbf9c661b..ff8996b4de4e1e66a0f2aac0180233640602caf3 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi
@@ -78,6 +78,7 @@ panel: panel@0 {
 		pinctrl-names = "default";
 		pinctrl-0 = <&lcd_rst>;
 		avdd-supply = <&ppvar_lcd>;
+		avee-supply = <&ppvar_lcd>;
 		pp1800-supply = <&v1p8_disp>;
 		pp3300-supply = <&pp3300_dx_edp>;
 		backlight = <&backlight>;

-- 
2.34.1

Re: [PATCH 3/5] arm64: dts: qcom: sc7180-trogdor-quackingstick: add missing avee-supply

[Doug Anderson]

Hi,

On Wed, Dec 4, 2024 at 2:57 AM Neil Armstrong <neil.armstrong@linaro.org> wrote:
>
> The bindings requires the avee-supply, use the same regulator as
> the avdd (positive voltage) which would also provide the negative
> voltage by definition.
>
> The fixes:
> sc7180-trogdor-quackingstick-r0.dts: panel@0: 'avee-supply' is a required property
>         from schema $id: http://devicetree.org/schemas/display/panel/boe,tv101wum-nl6.yaml#
>
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi
> index 00229b1515e60505f15fd58c6e7f16dcbf9c661b..ff8996b4de4e1e66a0f2aac0180233640602caf3 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-quackingstick.dtsi
> @@ -78,6 +78,7 @@ panel: panel@0 {
>                 pinctrl-names = "default";
>                 pinctrl-0 = <&lcd_rst>;
>                 avdd-supply = <&ppvar_lcd>;
> +               avee-supply = <&ppvar_lcd>;

Looks right. I guess technically they could be modeled as two
regulators, but it feels pointless. Looking at the schematics there is
a single component on the board that provides both the positive and
negative voltages. There are two enable lines on the component but
they're tied together on the board so we can't enable one separately
from the other anyway.

Thanks for the fix!

Reviewed-by: Douglas Anderson <dianders@chromium.org>

[PATCH 4/5] arm64: dts: qcom: sc7180-trogdor-pompom: rename 5v-choke thermal zone

[Neil Armstrong]

Rename the 5v-choke thermal zone to satisfy the bindings.

This fixes:
sc7180-trogdor-pompom-r2-lte.dts: thermal-zones: '5v-choke-thermal' does not match any of the regexes: '^[a-zA-Z][a-zA-Z0-9\\-]{1,10}-thermal$', 'pinctrl-[0-9]+'
	from schema $id: http://devicetree.org/schemas/thermal/thermal-zones.yaml#

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi
index ac8d4589e3fb74b9d9105a8ca2b0cce72de22d86..f7300ffbb4519a7973c74198fc0f9ca2d770bc3e 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi
@@ -12,11 +12,11 @@
 
 / {
 	thermal-zones {
-		5v-choke-thermal {
+		choke-5v-thermal {
 			thermal-sensors = <&pm6150_adc_tm 1>;
 
 			trips {
-				5v-choke-crit {
+				choke-5v-crit {
 					temperature = <125000>;
 					hysteresis = <1000>;
 					type = "critical";

-- 
2.34.1

Re: [PATCH 4/5] arm64: dts: qcom: sc7180-trogdor-pompom: rename 5v-choke thermal zone

[Dmitry Baryshkov]

On Wed, Dec 04, 2024 at 11:56:56AM +0100, Neil Armstrong wrote:
> Rename the 5v-choke thermal zone to satisfy the bindings.
> 
> This fixes:
> sc7180-trogdor-pompom-r2-lte.dts: thermal-zones: '5v-choke-thermal' does not match any of the regexes: '^[a-zA-Z][a-zA-Z0-9\\-]{1,10}-thermal$', 'pinctrl-[0-9]+'
> 	from schema $id: http://devicetree.org/schemas/thermal/thermal-zones.yaml#
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

-- 
With best wishes
Dmitry

Re: [PATCH 4/5] arm64: dts: qcom: sc7180-trogdor-pompom: rename 5v-choke thermal zone

[Doug Anderson]

Hi,

On Wed, Dec 4, 2024 at 2:57 AM Neil Armstrong <neil.armstrong@linaro.org> wrote:
>
> Rename the 5v-choke thermal zone to satisfy the bindings.
>
> This fixes:
> sc7180-trogdor-pompom-r2-lte.dts: thermal-zones: '5v-choke-thermal' does not match any of the regexes: '^[a-zA-Z][a-zA-Z0-9\\-]{1,10}-thermal$', 'pinctrl-[0-9]+'
>         from schema $id: http://devicetree.org/schemas/thermal/thermal-zones.yaml#
>
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Douglas Anderson <dianders@chromium.org>

[PATCH 5/5] arm64: dts: qcom: sc7180: fix psci power domain node names

[Neil Armstrong]

Rename the psci power domain node names to match the bindings.

This Fixes:
sc7180-acer-aspire1.dts: psci: 'cpu-cluster0', 'cpu0', 'cpu1', 'cpu2', 'cpu3', 'cpu4', 'cpu5', 'cpu6', 'cpu7' do not match any of the regexes: '^power-domain-', 'pinctrl-[0-9]+'

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 76fe314d2ad50d002ee6adf4659fa685ddae89de..e7773d215f34eba9a42808eb37fac7fa1fda87b1 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -580,55 +580,55 @@ psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";
 
-		cpu_pd0: cpu0 {
+		cpu_pd0: power-domain-cpu0 {
 			#power-domain-cells = <0>;
 			power-domains = <&cluster_pd>;
 			domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
 		};
 
-		cpu_pd1: cpu1 {
+		cpu_pd1: power-domain-cpu1 {
 			#power-domain-cells = <0>;
 			power-domains = <&cluster_pd>;
 			domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
 		};
 
-		cpu_pd2: cpu2 {
+		cpu_pd2: power-domain-cpu2 {
 			#power-domain-cells = <0>;
 			power-domains = <&cluster_pd>;
 			domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
 		};
 
-		cpu_pd3: cpu3 {
+		cpu_pd3: power-domain-cpu3 {
 			#power-domain-cells = <0>;
 			power-domains = <&cluster_pd>;
 			domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
 		};
 
-		cpu_pd4: cpu4 {
+		cpu_pd4: power-domain-cpu4 {
 			#power-domain-cells = <0>;
 			power-domains = <&cluster_pd>;
 			domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
 		};
 
-		cpu_pd5: cpu5 {
+		cpu_pd5: power-domain-cpu5 {
 			#power-domain-cells = <0>;
 			power-domains = <&cluster_pd>;
 			domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
 		};
 
-		cpu_pd6: cpu6 {
+		cpu_pd6: power-domain-cpu6 {
 			#power-domain-cells = <0>;
 			power-domains = <&cluster_pd>;
 			domain-idle-states = <&big_cpu_sleep_0 &big_cpu_sleep_1>;
 		};
 
-		cpu_pd7: cpu7 {
+		cpu_pd7: power-domain-cpu7 {
 			#power-domain-cells = <0>;
 			power-domains = <&cluster_pd>;
 			domain-idle-states = <&big_cpu_sleep_0 &big_cpu_sleep_1>;
 		};
 
-		cluster_pd: cpu-cluster0 {
+		cluster_pd: power-domain-cluster {
 			#power-domain-cells = <0>;
 			domain-idle-states = <&cluster_sleep_pc
 					      &cluster_sleep_cx_ret

-- 
2.34.1

Re: [PATCH 5/5] arm64: dts: qcom: sc7180: fix psci power domain node names

[Dmitry Baryshkov]

On Wed, Dec 04, 2024 at 11:56:57AM +0100, Neil Armstrong wrote:
> Rename the psci power domain node names to match the bindings.
> 
> This Fixes:
> sc7180-acer-aspire1.dts: psci: 'cpu-cluster0', 'cpu0', 'cpu1', 'cpu2', 'cpu3', 'cpu4', 'cpu5', 'cpu6', 'cpu7' do not match any of the regexes: '^power-domain-', 'pinctrl-[0-9]+'
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sc7180.dtsi | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-- 
With best wishes
Dmitry

Re: [PATCH 5/5] arm64: dts: qcom: sc7180: fix psci power domain node names

[Doug Anderson]

Hi,

On Wed, Dec 4, 2024 at 2:57 AM Neil Armstrong <neil.armstrong@linaro.org> wrote:
>
> Rename the psci power domain node names to match the bindings.
>
> This Fixes:
> sc7180-acer-aspire1.dts: psci: 'cpu-cluster0', 'cpu0', 'cpu1', 'cpu2', 'cpu3', 'cpu4', 'cpu5', 'cpu6', 'cpu7' do not match any of the regexes: '^power-domain-', 'pinctrl-[0-9]+'
>
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sc7180.dtsi | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)

Reviewed-by: Douglas Anderson <dianders@chromium.org>