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Tue, 30 Jan 2024 07:24:08 -0800 (PST) Received: from [192.168.100.86] ([176.61.106.68]) by smtp.gmail.com with ESMTPSA id bj12-20020a0560001e0c00b00337d6f0013esm7683953wrb.107.2024.01.30.07.24.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 30 Jan 2024 07:24:07 -0800 (PST) Message-ID: Date: Tue, 30 Jan 2024 15:24:06 +0000 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [V2] i2c: i2c-qcom-geni: Correct I2C TRE sequence Content-Language: en-US To: Viken Dadhaniya , andersson@kernel.org, konrad.dybcio@linaro.org, andi.shyti@kernel.org, linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, vkoul@kernel.org, quic_bjorande@quicinc.com, manivannan.sadhasivam@linaro.org Cc: quic_msavaliy@quicinc.com, quic_vtanuku@quicinc.com References: <20240129061003.4085-1-quic_vdadhani@quicinc.com> From: Bryan O'Donoghue In-Reply-To: <20240129061003.4085-1-quic_vdadhani@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 29/01/2024 06:10, Viken Dadhaniya wrote: > As per HPG(Hardware programming guide Since you are doing a V3 here, please amend this too. "As per HPG" means almost nothing outside of qcom. "As per Qualcomm's internal Hardware Programming Guide" Right thing to do to reference the document IMO but, you should make clear its an internal silicon specification that's not public. Also not sure the TRE description adds much. Just give a high level description of the sequences being out-of-order with respect to the hardware spec. --- bod