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Wed, 03 Jul 2024 09:16:12 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA05.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 4639GBc8025021 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 Jul 2024 09:16:11 GMT Received: from [10.218.10.146] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 3 Jul 2024 02:16:06 -0700 Message-ID: Date: Wed, 3 Jul 2024 14:46:03 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V4 8/8] arm64: dts: qcom: sm4450: add camera, display and gpu clock controller To: Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Vinod Koul , Vladimir Zapolskiy CC: , , , , Taniya Das , Jagadeesh Kona , Imran Shaik , Satya Priya Kakitapalli References: <20240611133752.2192401-1-quic_ajipan@quicinc.com> <20240611133752.2192401-9-quic_ajipan@quicinc.com> <76f5e3c7-a90b-42d2-8169-e5e2211a14a1@linaro.org> Content-Language: en-US From: Ajit Pandey In-Reply-To: <76f5e3c7-a90b-42d2-8169-e5e2211a14a1@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 2tf3mFBe-TlOvC8mIgbvW5ozTFNDXz5l X-Proofpoint-GUID: 2tf3mFBe-TlOvC8mIgbvW5ozTFNDXz5l X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-03_05,2024-07-02_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 bulkscore=0 spamscore=0 malwarescore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 phishscore=0 mlxscore=0 suspectscore=0 clxscore=1011 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407030068 On 6/13/2024 1:11 PM, Konrad Dybcio wrote: > > > On 6/11/24 15:37, Ajit Pandey wrote: >> Add device node for camera, display and graphics clock controller on >> Qualcomm SM4450 platform. >> >> Signed-off-by: Ajit Pandey >> --- > > None of these nodes reference a power domain (which would usually be > CX/MX/MMCX). This way, the RPMhPDs will never be scaled. > > The current upstream implementation only allows one power domain to be > scaled, but that's better than none (see other DTs for recent SoCs). > > Konrad SM4450 doesn't support MMCX and CX/MX domains will remain active so power-domains property is actually not required for SM4450 clock nodes. -- Thanks, and Regards Ajit