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Fri, 19 Dec 2025 05:16:28 -0800 (PST) X-Google-Smtp-Source: AGHT+IHoI0126nI02HWdOYrK7HmwSJwQglIvs3CVhlzhFNNwJeELwYLlPmot25vjNg43QVJ7InExPQ== X-Received: by 2002:a17:903:2b0c:b0:298:4718:909f with SMTP id d9443c01a7336-2a2f2a3c12fmr21977325ad.51.1766150188281; Fri, 19 Dec 2025 05:16:28 -0800 (PST) Received: from [10.217.217.28] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7ff7e588a30sm2440572b3a.55.2025.12.19.05.16.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 19 Dec 2025 05:16:27 -0800 (PST) Message-ID: Date: Fri, 19 Dec 2025 18:46:19 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V8 4/4] thermal: qcom: add support for PMIC5 Gen3 ADC thermal monitoring To: Jonathan Cameron Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, agross@kernel.org, andersson@kernel.org, lumag@kernel.org, dmitry.baryshkov@oss.qualcomm.com, konradybcio@kernel.org, daniel.lezcano@linaro.org, sboyd@kernel.org, amitk@kernel.org, thara.gopinath@gmail.com, lee@kernel.org, rafael@kernel.org, subbaraman.narayanamurthy@oss.qualcomm.com, david.collins@oss.qualcomm.com, anjelique.melendez@oss.qualcomm.com, kamal.wadhwa@oss.qualcomm.com, rui.zhang@intel.com, lukasz.luba@arm.com, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, cros-qcom-dts-watchers@chromium.org, quic_kotarake@quicinc.com, neil.armstrong@linaro.org, stephan.gerhold@linaro.org References: <20251127134036.209905-1-jishnu.prakash@oss.qualcomm.com> <20251127134036.209905-5-jishnu.prakash@oss.qualcomm.com> <20251207170401.1143fc22@jic23-huawei> Content-Language: en-US From: Jishnu Prakash In-Reply-To: <20251207170401.1143fc22@jic23-huawei> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjE5MDExMCBTYWx0ZWRfX1OtyEKIJHma0 3xqhmqS3VkMWN1m4QV+fOeJNcM+j9T0C1QVahFc8z6ndjFnPq/CCPaUhsRbb1O6hcahHAL0uHfu YP4vmni2We1JIVWgBu1n/0BGwhXg4gsK9B4NTrXtGBMBtIV05P67MelsJPi3U4wlBooj/o3Y11w YD41b8+/wVZUI6vpDU5HSnLSGaL0eLH/XwcsQ7x3idrOax0uyjUlTkn8grmP0rngQxLTymB+3JY WCBWW7QbBN1HlOTS9XMte6IZ1ab4bwUAsLbobOX9IWS+c+eGDclAccuV6lmdcleiWwCiaBvxAZO rmBPt1cStdhTIAI2fi1lti7NnxiDeh9L2D3ahvV0yLW7Xq8PvfzsKUVyarD1bel4xxsYCLCsk7w JbSAKmFMxXnGCv7BA99/NqSgDLebR6KKdKcfU2Xen5wFBnYoj1v6FebTr8qK0oQ+86Dd+JCxav8 wxqqTZ0d/zuGp2VewwA== X-Authority-Analysis: v=2.4 cv=dOmrWeZb c=1 sm=1 tr=0 ts=6945502d cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=wdI2RCEqRplqVT_zBhgA:9 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-ORIG-GUID: am78XKQy7NCYCL23hdWISKIAHDS1Mqir X-Proofpoint-GUID: am78XKQy7NCYCL23hdWISKIAHDS1Mqir X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-19_04,2025-12-17_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 bulkscore=0 malwarescore=0 spamscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512190110 Hi Jonathan, On 12/7/2025 10:34 PM, Jonathan Cameron wrote: > On Thu, 27 Nov 2025 19:10:36 +0530 > Jishnu Prakash wrote: > >> Add support for ADC_TM part of PMIC5 Gen3. >> >> This is an auxiliary driver under the Gen3 ADC driver, which implements the >> threshold setting and interrupt generating functionalities of QCOM ADC_TM >> drivers, used to support thermal trip points. >> >> Signed-off-by: Jishnu Prakash >> --- > Hi Jishnu > > Fresh read threw up a few more comments from me. > > See inline > > Thanks, > > Jonathan > >> diff --git a/drivers/thermal/qcom/qcom-spmi-adc-tm5-gen3.c b/drivers/thermal/qcom/qcom-spmi-adc-tm5-gen3.c >> new file mode 100644 >> index 000000000000..c6cc8ef76f7e >> --- /dev/null >> +++ b/drivers/thermal/qcom/qcom-spmi-adc-tm5-gen3.c > >> + >> +static void tm_handler_work(struct work_struct *work) >> +{ >> + struct adc_tm5_gen3_chip *adc_tm5 = container_of(work, struct adc_tm5_gen3_chip, >> + tm_handler_work); >> + struct adc_tm5_gen3_channel_props *chan_prop; > > Why not declare in the reduced scope below? Then could probably combine > declaration and assignment for this, and offset. OK, I'll just keep the following lines here: struct adc_tm5_gen3_chip *adc_tm5 = container_of(work, struct adc_tm5_gen3_chip, tm_handler_work); int sdam_index = -1; and declare the remaining variables in the loop. > > >> + u8 tm_status[2] = { }; >> + u8 buf[16] = { }; >> + int sdam_index = -1; >> + int i, ret; >> + >> + for (i = 0; i < adc_tm5->nchannels; i++) { > It's considered fine in new kernel code to declare the loop variable > as > for (int i = 0; > >> + bool upper_set, lower_set; >> + int temp, offset; >> + u16 code = 0; >> + >> + chan_prop = &adc_tm5->chan_props[i]; >> + offset = chan_prop->tm_chan_index; >> + >> + adc5_gen3_mutex_lock(adc_tm5->dev); >> + if (chan_prop->sdam_index != sdam_index) { >> + sdam_index = chan_prop->sdam_index; >> + ret = adc5_gen3_tm_status_check(adc_tm5, sdam_index, >> + tm_status, buf); >> + if (ret) { >> + adc5_gen3_mutex_unlock(adc_tm5->dev); > > If you had the guard() below, could perhaps use scoped_guard() here > to avoid need for unlocking in error paths. > That would be at the cost of increased indent however, so may not be worth it > or that may suggest factoring out some of this code as a helper. The mutex is meant to guard register writes, so it might be sufficient to have it around adc5_gen3_tm_status_check() alone. I'll make this change. > >> + break; >> + } >> + } >> + >> + upper_set = ((tm_status[0] & BIT(offset)) && chan_prop->high_thr_en); >> + lower_set = ((tm_status[1] & BIT(offset)) && chan_prop->low_thr_en); >> + adc5_gen3_mutex_unlock(adc_tm5->dev); >> + >> + if (!(upper_set || lower_set)) >> + continue; >> + >> + code = get_unaligned_le16(&buf[2 * offset]); >> + pr_debug("ADC_TM threshold code:%#x\n", code); >> + >> + ret = adc5_gen3_therm_code_to_temp(adc_tm5->dev, >> + &chan_prop->common_props, >> + code, &temp); >> + if (ret) { >> + dev_err(adc_tm5->dev, >> + "Invalid temperature reading, ret = %d, code=%#x\n", >> + ret, code); >> + continue; >> + } >> + >> + chan_prop->last_temp = temp; >> + chan_prop->last_temp_set = true; >> + thermal_zone_device_update(chan_prop->tzd, THERMAL_TRIP_VIOLATED); >> + } >> +} > >> +static int adc_tm5_gen3_set_trip_temp(struct thermal_zone_device *tz, >> + int low_temp, int high_temp) >> +{ >> + struct adc_tm5_gen3_channel_props *prop = thermal_zone_device_priv(tz); >> + struct adc_tm5_gen3_chip *adc_tm5; >> + int ret; >> + >> + if (!prop || !prop->chip) >> + return -EINVAL; >> + >> + adc_tm5 = prop->chip; >> + >> + dev_dbg(adc_tm5->dev, "channel:%s, low_temp(mdegC):%d, high_temp(mdegC):%d\n", >> + prop->common_props.label, low_temp, high_temp); >> + >> + adc5_gen3_mutex_lock(adc_tm5->dev); >> + if (high_temp == INT_MAX && low_temp <= -INT_MAX) > > How is low temp lower than the min value that fits in an integer? Yes, that check should be (low_temp == -INT_MAX), I'll fix it. > >> + ret = adc_tm5_gen3_disable_channel(prop); >> + else >> + ret = adc_tm5_gen3_configure(prop, low_temp, high_temp); >> + adc5_gen3_mutex_unlock(adc_tm5->dev); > Might be worth a DEFINE_GUARD() so you can do > guard(adc5_gen3)(adc_tm5->dev); > if (high_temp = INT_MAX && low_temp <= -INT_MAX) > return adc_tm5_gen3_disable_channel(prop); > > return adc_tm5... > > I haven't looked to see if this is useful elsewhere in these drivers. > I'll add this and address your other comments. Thanks, Jishnu >> + >> + return ret; >> +}