From: Srinivas Rao L <lsrao@codeaurora.org>
To: Maulik Shah <mkshah@codeaurora.org>,
swboyd@chromium.org, mka@chromium.org, evgreen@chromium.org,
bjorn.andersson@linaro.org
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
agross@kernel.org, dianders@chromium.org, rnayak@codeaurora.org,
ilina@codeaurora.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v6 1/3] arm64: dts: qcom: sc7180: Add cpuidle low power states
Date: Mon, 24 Feb 2020 12:11:42 +0530 [thread overview]
Message-ID: <bc99547e-4f9a-a959-fb59-fe0b19216eb0@codeaurora.org> (raw)
In-Reply-To: <1582277527-19638-2-git-send-email-mkshah@codeaurora.org>
Reviewed-by: Srinivas Rao L <lsrao@codeaurora.org>
Regards,
Srinivas.
On 2/21/2020 3:02 PM, Maulik Shah wrote:
> Add device bindings for cpuidle states for cpu devices.
>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
> ---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 78 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 78 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index cc5a94f..2941a7e 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -86,6 +86,9 @@
> compatible = "arm,armv8";
> reg = <0x0 0x0>;
> enable-method = "psci";
> + cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> + &LITTLE_CPU_SLEEP_1
> + &CLUSTER_SLEEP_0>;
> next-level-cache = <&L2_0>;
> #cooling-cells = <2>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> @@ -103,6 +106,9 @@
> compatible = "arm,armv8";
> reg = <0x0 0x100>;
> enable-method = "psci";
> + cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> + &LITTLE_CPU_SLEEP_1
> + &CLUSTER_SLEEP_0>;
> next-level-cache = <&L2_100>;
> #cooling-cells = <2>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> @@ -117,6 +123,9 @@
> compatible = "arm,armv8";
> reg = <0x0 0x200>;
> enable-method = "psci";
> + cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> + &LITTLE_CPU_SLEEP_1
> + &CLUSTER_SLEEP_0>;
> next-level-cache = <&L2_200>;
> #cooling-cells = <2>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> @@ -131,6 +140,9 @@
> compatible = "arm,armv8";
> reg = <0x0 0x300>;
> enable-method = "psci";
> + cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> + &LITTLE_CPU_SLEEP_1
> + &CLUSTER_SLEEP_0>;
> next-level-cache = <&L2_300>;
> #cooling-cells = <2>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> @@ -145,6 +157,9 @@
> compatible = "arm,armv8";
> reg = <0x0 0x400>;
> enable-method = "psci";
> + cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> + &LITTLE_CPU_SLEEP_1
> + &CLUSTER_SLEEP_0>;
> next-level-cache = <&L2_400>;
> #cooling-cells = <2>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> @@ -159,6 +174,9 @@
> compatible = "arm,armv8";
> reg = <0x0 0x500>;
> enable-method = "psci";
> + cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> + &LITTLE_CPU_SLEEP_1
> + &CLUSTER_SLEEP_0>;
> next-level-cache = <&L2_500>;
> #cooling-cells = <2>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> @@ -173,6 +191,9 @@
> compatible = "arm,armv8";
> reg = <0x0 0x600>;
> enable-method = "psci";
> + cpu-idle-states = <&BIG_CPU_SLEEP_0
> + &BIG_CPU_SLEEP_1
> + &CLUSTER_SLEEP_0>;
> next-level-cache = <&L2_600>;
> #cooling-cells = <2>;
> qcom,freq-domain = <&cpufreq_hw 1>;
> @@ -187,6 +208,9 @@
> compatible = "arm,armv8";
> reg = <0x0 0x700>;
> enable-method = "psci";
> + cpu-idle-states = <&BIG_CPU_SLEEP_0
> + &BIG_CPU_SLEEP_1
> + &CLUSTER_SLEEP_0>;
> next-level-cache = <&L2_700>;
> #cooling-cells = <2>;
> qcom,freq-domain = <&cpufreq_hw 1>;
> @@ -195,6 +219,60 @@
> next-level-cache = <&L3_0>;
> };
> };
> +
> + idle-states {
> + entry-method = "psci";
> +
> + LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
> + compatible = "arm,idle-state";
> + idle-state-name = "little-power-down";
> + arm,psci-suspend-param = <0x40000003>;
> + entry-latency-us = <549>;
> + exit-latency-us = <901>;
> + min-residency-us = <1774>;
> + local-timer-stop;
> + };
> +
> + LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
> + compatible = "arm,idle-state";
> + idle-state-name = "little-rail-power-down";
> + arm,psci-suspend-param = <0x40000004>;
> + entry-latency-us = <702>;
> + exit-latency-us = <915>;
> + min-residency-us = <4001>;
> + local-timer-stop;
> + };
> +
> + BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
> + compatible = "arm,idle-state";
> + idle-state-name = "big-power-down";
> + arm,psci-suspend-param = <0x40000003>;
> + entry-latency-us = <523>;
> + exit-latency-us = <1244>;
> + min-residency-us = <2207>;
> + local-timer-stop;
> + };
> +
> + BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
> + compatible = "arm,idle-state";
> + idle-state-name = "big-rail-power-down";
> + arm,psci-suspend-param = <0x40000004>;
> + entry-latency-us = <526>;
> + exit-latency-us = <1854>;
> + min-residency-us = <5555>;
> + local-timer-stop;
> + };
> +
> + CLUSTER_SLEEP_0: cluster-sleep-0 {
> + compatible = "arm,idle-state";
> + idle-state-name = "cluster-power-down";
> + arm,psci-suspend-param = <0x40003444>;
> + entry-latency-us = <3263>;
> + exit-latency-us = <6562>;
> + min-residency-us = <9926>;
> + local-timer-stop;
> + };
> + };
> };
>
> memory@80000000 {
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2020-02-24 6:42 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-21 9:32 [PATCH v6 0/3] Invoke rpmh_flush for non OSI targets Maulik Shah
2020-02-21 9:32 ` [PATCH v6 1/3] arm64: dts: qcom: sc7180: Add cpuidle low power states Maulik Shah
2020-02-24 6:41 ` Srinivas Rao L [this message]
2020-02-21 9:32 ` [PATCH v6 2/3] soc: qcom: rpmh: Update dirty flag only when data changes Maulik Shah
2020-02-24 6:43 ` Srinivas Rao L
2020-02-21 9:32 ` [PATCH v6 3/3] soc: qcom: rpmh: Invoke rpmh_flush for dirty caches Maulik Shah
2020-02-24 6:48 ` Srinivas Rao L
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