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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ad1891a3bf9sm30951066b.50.2025.05.02.03.38.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 02 May 2025 03:38:13 -0700 (PDT) Message-ID: Date: Fri, 2 May 2025 12:38:10 +0200 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/6] clk: qcom: ipq-cmn-pll: Add IPQ5018 SoC support To: george.moussalem@outlook.com, Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Luo Jie , Lee Jones , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250502-ipq5018-cmn-pll-v1-0-27902c1c4071@outlook.com> <20250502-ipq5018-cmn-pll-v1-3-27902c1c4071@outlook.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250502-ipq5018-cmn-pll-v1-3-27902c1c4071@outlook.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=B7i50PtM c=1 sm=1 tr=0 ts=6814a097 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=dt9VzEwgFbYA:10 a=UqCG9HQmAAAA:8 a=Mz09UsMhJyW2FU7oNKkA:9 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 X-Proofpoint-GUID: YAT3jL03CvymbaobS2ZVmAg1TuY1zf2G X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTAyMDA4MyBTYWx0ZWRfXwYZhn/0GCGMm MyL+7fmMpp/pWjaLl0BMsyF+gj39jg570g9KTCztttnamz7on4FiZKabVY+YkVPfHRS0vEK8rVL ftPWRdox9xURh8TKuP/wFfyz8Kp5zdApSipjwH3c6Vd8f/5y1QN8e6vL0J1XEj0uRFWCauLiOYc otmQ3BvDq+bz9jRpqnvhPHiLSFmXnexKOpIt6zefR3X0reVASeEiWMRISQsYBMSz3kYMy/6ZQYD Lo6LpoxLLWi3G1ZhE51uRgFEnBGQYp9oRwkKPAaD+Psg1sQ1vjLLPIu66y6eUOG5pKUOGsNpOLT jyTozq6GP0AGDTiJWNDsZeuUEcKz4FbGKeRvgb//jqA0/FR29HhV0vJKmRbKGBLlO7x6QFoULyy Ne+XfcsJBMFq51tKvu5Wul0Zil53XMoLSwX663zEc+lqLNxLCe2jsAbG4l0rMuXpIXVvnBy3 X-Proofpoint-ORIG-GUID: YAT3jL03CvymbaobS2ZVmAg1TuY1zf2G X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-02_01,2025-04-30_01,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 bulkscore=0 suspectscore=0 spamscore=0 clxscore=1015 mlxscore=0 impostorscore=0 mlxlogscore=691 lowpriorityscore=0 malwarescore=0 phishscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2505020083 On 5/2/25 12:15 PM, George Moussalem via B4 Relay wrote: > From: George Moussalem > > The CMN PLL in IPQ5018 SoC supplies fixed clocks to XO, sleep, and the > ethernet block. The CMN PLL to the ethernet block must be enabled first > by setting a specific register in the TCSR area set in the device tree. > > Signed-off-by: George Moussalem > --- [...] > +static inline int ipq_cmn_pll_eth_enable(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + unsigned int cmn_pll_offset; > + struct regmap *tcsr; > + int ret; > + > + tcsr = syscon_regmap_lookup_by_phandle_args(dev->of_node, "qcom,cmn-pll-eth-enable", > + 1, &cmn_pll_offset); So we have syscon_regmap_lookup_by_phandle_args() and syscon_regmap_lookup_by_phandle_optional(), but we could also use a syscon_regmap_lookup_by_phandle_args_optional() - could you add that in drivers/mfd/syscon.c? > + if (IS_ERR(tcsr)) { > + ret = PTR_ERR(tcsr); > + /* > + * continue if -ENODEV is returned as not all IPQ SoCs > + * need to enable CMN PLL. If it's another error, return it. > + */ > + if (ret == -ENODEV) > + tcsr = NULL; > + else > + return ret; > + } > + > + if (tcsr) { > + ret = regmap_update_bits(tcsr, cmn_pll_offset + TCSR_CMN_PLL_ETH, I think it's better to just pass the exact register that we need, instead of some loosely defined subregion - especially given the structure likely will change across platforms > + TCSR_CMN_PLL_ETH_ENABLE, TCSR_CMN_PLL_ETH_ENABLE); regmap_set_bits() > + if (ret) > + return ret; You can initialize ret to 0 and return ret below, unconditionally > + } > + > + return 0; > +} > + > static int ipq_cmn_pll_clk_probe(struct platform_device *pdev) > { > struct device *dev = &pdev->dev; > int ret; > > + ret = ipq_cmn_pll_eth_enable(pdev); > + if (ret) > + return dev_err_probe(dev, ret, > + "Fail to enable CMN PLL to ethernet"); Fail*ed* Konrad