From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24799C0015E for ; Sat, 29 Jul 2023 23:18:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229448AbjG2XSQ (ORCPT ); Sat, 29 Jul 2023 19:18:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45766 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229445AbjG2XSQ (ORCPT ); Sat, 29 Jul 2023 19:18:16 -0400 Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [IPv6:2a00:1450:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A097D2D4C for ; Sat, 29 Jul 2023 16:18:14 -0700 (PDT) Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-99357737980so510236466b.2 for ; Sat, 29 Jul 2023 16:18:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1690672693; x=1691277493; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=9YBd5+9kNrxjQQ/+IaoqmXKdmoRjBOswyaZ9ByqKpWw=; b=ULtE+G7Mfj0WgGd0OV9V4TcQsS3aosjjQtzuyLIEqI9IOmnZNR3/s7PcH3isLV4F+H et1qcwS7AE6zBc4h2spZJyv+EKPCLNC9QO0lbN7Wc3pCYavXaYoxAXn6ho/S19GkZeRs ZLWXzMQtUxLK1BjSuyoaskc7a06RhLPYAalsitskAhBe9vEZ4TJDRyhcI4kXeLMf+80z YShwhEfmQjiGkmXorxHvCE6D2jAMmTr7AbnHvC3GThNgsDSN0PK8ZVgWkv6Bd0jnKMI3 fqfNY6enPl8ZIft8xXyv9/0MTIUa3qVRbeH2CxN5GJnHEq5zauJ5tI2YdhqNj5bn3Wgh 21NQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690672693; x=1691277493; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=9YBd5+9kNrxjQQ/+IaoqmXKdmoRjBOswyaZ9ByqKpWw=; b=Kbe0C3lx6zt1itox+BxWrbzIMDo7rjeqYFZI/if8tDotxkyU6nRFtiLenx51GnzTvf vUOi7MooJ933taqO/ergP5ZouKmN3mLDoUmTU7GaHNUFwejV6pwttLdCyE92vCZjplz2 4TyxXiZB6gG5qh/obtwG4KyeBsUAarr02xWE6noc1f1hvFTotj1+ZtNtthTIR3QG1Rl2 Hnpl3u/TcsnAWTKAMhG+XVgOWXKPkgXeRo5Tp/1WQ3eLTpiaJYXYaGqEPiCIQEUu5dbT NkH/oXtOFb7XCnZwwI1irj8ho+/b18et8LcgIiue8Oh3p4a5jDCwVVcRsClF7xAzYNQ+ YMQg== X-Gm-Message-State: ABy/qLZD7i3VKof9ojhAQ6eTnshlXK7yMXdHUOh7oUYJn1z55l49AxTY FHhVgKO3Q9kfwiqbhG/pA/U8fHLvjRTt37bWGDU= X-Google-Smtp-Source: APBJJlH7KtG+KWUbmIKej+0VkTarA9QEYtaIl/sY5FxN2HJh/DmXLgqQXVmkDHTGEcwbOY05hXqUbA== X-Received: by 2002:a17:907:78d3:b0:991:e7c2:d0be with SMTP id kv19-20020a17090778d300b00991e7c2d0bemr3999695ejc.63.1690672692994; Sat, 29 Jul 2023 16:18:12 -0700 (PDT) Received: from [10.10.15.130] ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id jt9-20020a170906dfc900b0098e2969ed44sm3828251ejc.45.2023.07.29.16.18.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 29 Jul 2023 16:18:12 -0700 (PDT) Message-ID: Date: Sun, 30 Jul 2023 02:18:10 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH 1/7] drm/msm/dpu: enable PINGPONG TE operations only when supported by HW Content-Language: en-GB To: Marijn Suijten Cc: Rob Clark , Sean Paul , Abhinav Kumar , Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org References: <20230727162104.1497483-1-dmitry.baryshkov@linaro.org> <20230727162104.1497483-2-dmitry.baryshkov@linaro.org> From: Dmitry Baryshkov In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 29/07/2023 21:31, Marijn Suijten wrote: > On 2023-07-29 02:59:32, Dmitry Baryshkov wrote: >> On 27/07/2023 23:03, Marijn Suijten wrote: >>> On 2023-07-27 19:20:58, Dmitry Baryshkov wrote: >>>> The DPU_PINGPONG_TE bit is set for all PINGPONG blocks on DPU < 5.0. >>>> Rather than checking for the flag, check for the presense of the >>>> corresponding interrupt line. >>>> >>>> Signed-off-by: Dmitry Baryshkov >>> >>> That's a smart use of the interrupt field. I both like it, and I do >>> not. While we didn't do any validation for consistency previously, this >>> means we now have multiple ways of controlling available "features": >>> >>> - Feature flags on hardware blocks; >>> - Presence of certain IRQs; >>> - DPU core revision. >> >> I hesitated here too. For INTF it is clear that there is no other good >> way to check for the TE feature. For PP we can just check for the DPU >> revision. > > For both we could additionally check the DPU revision, and for INTF we > could check for TYPE_DSI. Both would aid in extra validation, if we > require the IRQ to be present or absent under these conditions. Yep, maybe that's better. > > It might also help to document this, either here and on the respective > struct fields so that catalog implementers know when they should supply > or leave out an IRQ? Probably a WARN_ON would be enough. > > - Marijn > >>> Maybe that is more confusing to follow? Regardless of that I'm >>> convinced that this patch does what it's supposed to and gets rid of >>> some ambiguity. Maybe a comment above the IF explaining the "PP TE" >>> feature could alleviate the above concerns thoo. Hence: >>> >>> Reviewed-by: Marijn Suijten >>> >>>> --- >>>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 2 +- >>>> 1 file changed, 1 insertion(+), 1 deletion(-) >>>> >>>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c >>>> index 9298c166b213..912a3bdf8ad4 100644 >>>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c >>>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c >>>> @@ -296,7 +296,7 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(const struct dpu_pingpong_cfg *cfg, >>>> c->idx = cfg->id; >>>> c->caps = cfg; >>>> >>>> - if (test_bit(DPU_PINGPONG_TE, &cfg->features)) { >>>> + if (cfg->intr_rdptr) { >>>> c->ops.enable_tearcheck = dpu_hw_pp_enable_te; >>>> c->ops.disable_tearcheck = dpu_hw_pp_disable_te; >>>> c->ops.connect_external_te = dpu_hw_pp_connect_external_te; >>>> -- >>>> 2.39.2 >>>> >> >> -- >> With best wishes >> Dmitry >> -- With best wishes Dmitry