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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id m4-20020a056512358400b00499b27a329esm96141lfr.300.2022.11.24.03.51.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 24 Nov 2022 03:51:55 -0800 (PST) Message-ID: Date: Thu, 24 Nov 2022 12:51:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.0 Subject: Re: [PATCH v2 2/9] dt-bindings: clock: Add SM8550 TCSR CC clocks Content-Language: en-US To: Abel Vesa , Andy Gross , Bjorn Andersson , Konrad Dybcio , Mike Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski Cc: Linux Kernel Mailing List , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org References: <20221123142009.594781-1-abel.vesa@linaro.org> <20221123142009.594781-3-abel.vesa@linaro.org> From: Krzysztof Kozlowski In-Reply-To: <20221123142009.594781-3-abel.vesa@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 23/11/2022 15:20, Abel Vesa wrote: > Add bindings documentation for clock TCSR driver on SM8550. > > Signed-off-by: Abel Vesa > --- > > Changes since v1: > * based on recent bindings, like Krzysztof asked > * used qcom,gcc.yaml and dropped redundant properties > * used additionalProperties instead unevaluatedProperties > * renamed qcom,tcsrcc-sm8550.h to qcom,sm8550-tcsrcc.h, to match > compatible > * added dual lincese to qcom,sm8550-tcsrcc.h > * moved patch to the beginning of patchset > * dropped redundant "bindings" from subject line > > .../bindings/clock/qcom,sm8550-tcsrcc.yaml | 39 +++++++++++++++++++ > .../dt-bindings/clock/qcom,sm8550-tcsrcc.h | 18 +++++++++ > 2 files changed, 57 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml > create mode 100644 include/dt-bindings/clock/qcom,sm8550-tcsrcc.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml > new file mode 100644 > index 000000000000..a4531a7cad8c > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml > @@ -0,0 +1,39 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsrcc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm TCSR Clock Controller on SM8550 > + > +maintainers: > + - Bjorn Andersson > + > +description: | > + Qualcomm TCSR clock control module provides the clocks, resets and > + power domains on SM8550 > + > + See also:: include/dt-bindings/clock/qcom,sm8550-tcsrcc.h > + > +allOf: > + - $ref qcom,gcc.yaml# I am not sure if this is similar block as GCC (or how similar). This wasn't here previously. There is also a typo (missing :), so bindings were not tested. :) > + > +properties: > + compatible: > + const: qcom,sm8550-tcsrcc > + > +required: > + - compatible > + > +additionalProperties: false > + > +examples: > + - | > + clock-controller@1fc0000 { > + compatible = "qcom,sm8550-tcsrcc"; > + reg = <0x1fc0000 0x30000>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + }; > + > +... > diff --git a/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h b/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h > new file mode 100644 > index 000000000000..4ce98ffc43ce > --- /dev/null > +++ b/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h > @@ -0,0 +1,18 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > +/* > + * Copyright (c) 2022, The Linux Foundation. All rights reserved. > + * Copyright (c) 2022, Linaro Limited > + */ > + > +#ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H > +#define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H > + > +/* GCC clocks */ And these are TCSR CC clocks :) Best regards, Krzysztof