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Mon, 25 Nov 2024 02:31:50 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4AP2VnCS000887 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 25 Nov 2024 02:31:49 GMT Received: from [10.64.16.151] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Sun, 24 Nov 2024 18:31:43 -0800 Message-ID: Date: Mon, 25 Nov 2024 10:31:40 +0800 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 7/9] drm/msm/dsi: Add support for SM6150 To: Dmitry Baryshkov CC: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , "Krishna Manikandan" , Bjorn Andersson , Konrad Dybcio , "Catalin Marinas" , Will Deacon , Li Liu , Xiangxu Yin , , , , , , References: <20241122-add-display-support-for-qcs615-platform-v3-0-35252e3a51fe@quicinc.com> <20241122-add-display-support-for-qcs615-platform-v3-7-35252e3a51fe@quicinc.com> Content-Language: en-US From: fange zhang In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: eXnJPPWRCeP9YaHrlQwUnXbriAG3mtf0 X-Proofpoint-ORIG-GUID: eXnJPPWRCeP9YaHrlQwUnXbriAG3mtf0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 clxscore=1015 phishscore=0 spamscore=0 adultscore=0 impostorscore=0 mlxscore=0 malwarescore=0 suspectscore=0 mlxlogscore=966 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411250021 On 2024/11/22 18:10, Dmitry Baryshkov wrote: > On Fri, Nov 22, 2024 at 05:56:50PM +0800, Fange Zhang wrote: >> From: Li Liu >> >> Add support for DSI 2.3.1 (block used on SM6150). >> >> Signed-off-by: Li Liu >> Signed-off-by: Fange Zhang >> --- >> drivers/gpu/drm/msm/dsi/dsi_cfg.c | 4 +++- >> drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 + >> 2 files changed, 4 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c >> index 10ba7d153d1cfc9015f527c911c4658558f6e29e..fe02724bddf69c2e8d6816589f4ea410fa666e5b 100644 >> --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c >> +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c >> @@ -171,7 +171,7 @@ static const struct msm_dsi_config sdm845_dsi_cfg = { >> .num_bus_clks = ARRAY_SIZE(dsi_v2_4_clk_names), >> .io_start = { >> { 0xae94000, 0xae96000 }, /* SDM845 / SDM670 */ >> - { 0x5e94000 }, /* QCM2290 / SM6115 / SM6125 / SM6375 */ >> + { 0x5e94000 }, /* QCM2290 / SM6115 / SM6125 / SM6150 / SM6375 */ > > Not true Should I remove it or add it behind the SDM670? > >> }, >> }; >> >> @@ -286,6 +286,8 @@ static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = { >> &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, >> {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_3_0, >> &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, >> + {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_3_1, >> + &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, >> {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_0, >> &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops}, >> {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_1, >> diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h b/drivers/gpu/drm/msm/dsi/dsi_cfg.h >> index 4c9b4b37681b066dbbc34876c38d99deee24fc82..120cb65164c1ba1deb9acb513e5f073bd560c496 100644 >> --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h >> +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h >> @@ -23,6 +23,7 @@ >> #define MSM_DSI_6G_VER_MINOR_V2_2_0 0x20000000 >> #define MSM_DSI_6G_VER_MINOR_V2_2_1 0x20020001 >> #define MSM_DSI_6G_VER_MINOR_V2_3_0 0x20030000 >> +#define MSM_DSI_6G_VER_MINOR_V2_3_1 0x20030001 >> #define MSM_DSI_6G_VER_MINOR_V2_4_0 0x20040000 >> #define MSM_DSI_6G_VER_MINOR_V2_4_1 0x20040001 >> #define MSM_DSI_6G_VER_MINOR_V2_5_0 0x20050000 >> >> -- >> 2.34.1 >> >