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([2a01:e0a:982:cbb0:ac4e:a5fe:7f71:8d59]) by smtp.gmail.com with ESMTPSA id o4-20020a5d58c4000000b0033333bee379sm13767115wrf.107.2023.12.13.08.46.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 13 Dec 2023 08:46:02 -0800 (PST) Message-ID: Date: Wed, 13 Dec 2023 17:46:01 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/4] arm64: dts: qcom: sm8550: move Soundwire pinctrl to its nodes Content-Language: en-GB To: Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20231213162856.188566-1-krzysztof.kozlowski@linaro.org> <20231213162856.188566-4-krzysztof.kozlowski@linaro.org> From: Neil Armstrong In-Reply-To: <20231213162856.188566-4-krzysztof.kozlowski@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Le 13/12/2023 à 17:28, Krzysztof Kozlowski a écrit : > Pin configuration for Soundwire bus should be set in Soundwire > controller nodes, not in the associated macro codec node. This > placement change should not have big impact in general, because macro > codec is a clock provider for Soundwire controller, thus its devices is > probed first. However it will have impact for disabled Soundwire buses, > e.g. WSA2, because after this change the pins will be left in default > state. > > We also follow similar approach in newer SoCs, like Qualcomm SM8650. > > Signed-off-by: Krzysztof Kozlowski > --- > arch/arm64/boot/dts/qcom/sm8550.dtsi | 20 ++++++++++++-------- > 1 file changed, 12 insertions(+), 8 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > index 1f06fd33d1ce..d8f79b5895f5 100644 > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > @@ -2050,8 +2050,6 @@ lpass_wsa2macro: codec@6aa0000 { > > #clock-cells = <0>; > clock-output-names = "wsa2-mclk"; > - pinctrl-names = "default"; > - pinctrl-0 = <&wsa2_swr_active>; > #sound-dai-cells = <1>; > }; > > @@ -2063,6 +2061,9 @@ swr3: soundwire-controller@6ab0000 { > clock-names = "iface"; > label = "WSA2"; > > + pinctrl-0 = <&wsa2_swr_active>; > + pinctrl-names = "default"; > + > qcom,din-ports = <4>; > qcom,dout-ports = <9>; > > @@ -2096,8 +2097,6 @@ lpass_rxmacro: codec@6ac0000 { > > #clock-cells = <0>; > clock-output-names = "mclk"; > - pinctrl-names = "default"; > - pinctrl-0 = <&rx_swr_active>; > #sound-dai-cells = <1>; > }; > > @@ -2109,6 +2108,9 @@ swr1: soundwire-controller@6ad0000 { > clock-names = "iface"; > label = "RX"; > > + pinctrl-0 = <&rx_swr_active>; > + pinctrl-names = "default"; > + > qcom,din-ports = <1>; > qcom,dout-ports = <11>; > > @@ -2142,8 +2144,6 @@ lpass_txmacro: codec@6ae0000 { > > #clock-cells = <0>; > clock-output-names = "mclk"; > - pinctrl-names = "default"; > - pinctrl-0 = <&tx_swr_active>; > #sound-dai-cells = <1>; > }; > > @@ -2161,8 +2161,6 @@ lpass_wsamacro: codec@6b00000 { > > #clock-cells = <0>; > clock-output-names = "mclk"; > - pinctrl-names = "default"; > - pinctrl-0 = <&wsa_swr_active>; > #sound-dai-cells = <1>; > }; > > @@ -2174,6 +2172,9 @@ swr0: soundwire-controller@6b10000 { > clock-names = "iface"; > label = "WSA"; > > + pinctrl-0 = <&wsa_swr_active>; > + pinctrl-names = "default"; > + > qcom,din-ports = <4>; > qcom,dout-ports = <9>; > > @@ -2203,6 +2204,9 @@ swr2: soundwire-controller@6d30000 { > clock-names = "iface"; > label = "TX"; > > + pinctrl-0 = <&tx_swr_active>; > + pinctrl-names = "default"; > + > qcom,din-ports = <4>; > qcom,dout-ports = <0>; > qcom,ports-sinterval-low = /bits/ 8 <0x01 0x01 0x03 0x03>; Reviewed-by: Neil Armstrong