From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27617C6379D for ; Tue, 17 Nov 2020 19:53:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D22F52222C for ; Tue, 17 Nov 2020 19:53:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="w5EgcsU3" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728309AbgKQTx3 (ORCPT ); Tue, 17 Nov 2020 14:53:29 -0500 Received: from z5.mailgun.us ([104.130.96.5]:59889 "EHLO z5.mailgun.us" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730068AbgKQTx3 (ORCPT ); Tue, 17 Nov 2020 14:53:29 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1605642809; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=I8Uoa9WMfOpRw2GhOBpzrpwBUS+efGBMbXmJ+Bhf1nQ=; b=w5EgcsU3c8mUiSVlNz5hwqIGTDkf0UsOTQ/2BAZLReNFPLmE4AjRHZzFPXBsCrbjOvPStAFA lVekiShmHXUrIi3to1jtfRnfI+WvJgCJqGmyj4P6p5iBHN6s6frBRLvliIaWXFf9gS1OZ+LH q/t+eD+P5GW382GKX23FniEm8AY= X-Mailgun-Sending-Ip: 104.130.96.5 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n06.prod.us-west-2.postgun.com with SMTP id 5fb42a2f8bd2e3c222a75450 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Tue, 17 Nov 2020 19:53:19 GMT Sender: abhinavk=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id EAA03C43469; Tue, 17 Nov 2020 19:53:18 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: abhinavk) by smtp.codeaurora.org (Postfix) with ESMTPSA id 8327FC43462; Tue, 17 Nov 2020 19:53:17 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Tue, 17 Nov 2020 11:53:17 -0800 From: abhinavk@codeaurora.org To: Chen Zhou Cc: robdclark@gmail.com, airlied@linux.ie, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: Re: [Freedreno] [PATCH] drm/msm/dpu: Fix error return code in dpu_mdss_init() In-Reply-To: <20201117025617.168259-1-chenzhou10@huawei.com> References: <20201117025617.168259-1-chenzhou10@huawei.com> Message-ID: X-Sender: abhinavk@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 2020-11-16 18:56, Chen Zhou wrote: > Fix to return a negative error code from the error handling case > instead of 0 in function dpu_mdss_init(), as done elsewhere in this > function. > > Fixes: 070e64dc1bbc ("drm/msm/dpu: Convert to a chained irq chip") > Reported-by: Hulk Robot > Signed-off-by: Chen Zhou Reviewed-by: Abhinav Kumar > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c > index cd4078807db1..6e600b4ca995 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c > @@ -297,8 +297,10 @@ int dpu_mdss_init(struct drm_device *dev) > goto irq_domain_error; > > irq = platform_get_irq(pdev, 0); > - if (irq < 0) > + if (irq < 0) { > + ret = irq; > goto irq_error; > + } > > irq_set_chained_handler_and_data(irq, dpu_mdss_irq, > dpu_mdss);