From: abhinavk-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
To: Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Cc: jeykumar-jfJNa2p1gH1BDgjK7y7TUQ@public.gmane.org,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
hoegsberg-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
linux-arm-msm-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
chandanu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
Subject: Re: [DPU PATCH v2 1/2] drm/msm/dsi: check video mode engine status before waiting
Date: Fri, 13 Apr 2018 15:04:48 -0700 [thread overview]
Message-ID: <c5c2cbf36c5fabee154eaa03801e71dc@codeaurora.org> (raw)
In-Reply-To: <8353aed54639deed0adee6671bbd1895-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
On 2018-04-13 14:10, abhinavk@codeaurora.org wrote:
> Hi Sean
>
> Thanks for the review.
>
> Reply inline.
>
> On 2018-04-13 13:26, Sean Paul wrote:
>> On Tue, Apr 10, 2018 at 06:54:06PM -0700, Abhinav Kumar wrote:
>>> Make sure the video mode engine is on before waiting
>>> for the video done interrupt.
>>>
>>> Otherwise it leads to silent timeouts increasing display
>>> turn ON time.
>>>
>>> Changes in v2:
>>> - Replace pr_err with dev_err
>>> - Changed error message
>>>
>>> Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
>>> ---
>>> drivers/gpu/drm/msm/dsi/dsi_host.c | 15 +++++++++++----
>>> 1 file changed, 11 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
>>> b/drivers/gpu/drm/msm/dsi/dsi_host.c
>>> index 7a03a94..5b7b290 100644
>>> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
>>> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
>>> @@ -173,6 +173,7 @@ struct msm_dsi_host {
>>>
>>> bool registered;
>>> bool power_on;
>>> + bool enabled;
>>> int irq;
>>> };
>>>
>>> @@ -986,13 +987,19 @@ static void dsi_set_tx_power_mode(int mode,
>>> struct msm_dsi_host *msm_host)
>>>
>>> static void dsi_wait4video_done(struct msm_dsi_host *msm_host)
>>> {
>>> + u32 ret = 0;
>>> + struct device *dev = &msm_host->pdev->dev;
>>> +
>>> dsi_intr_ctrl(msm_host, DSI_IRQ_MASK_VIDEO_DONE, 1);
>>>
>>> reinit_completion(&msm_host->video_comp);
>>>
>>> - wait_for_completion_timeout(&msm_host->video_comp,
>>> + ret = wait_for_completion_timeout(&msm_host->video_comp,
>>> msecs_to_jiffies(70));
>>>
>>> + if (ret <= 0)
>>> + dev_err(dev, "wait for video done timed out\n");
>>> +
>>> dsi_intr_ctrl(msm_host, DSI_IRQ_MASK_VIDEO_DONE, 0);
>>> }
>>>
>>> @@ -1001,7 +1008,7 @@ static void dsi_wait4video_eng_busy(struct
>>> msm_dsi_host *msm_host)
>>> if (!(msm_host->mode_flags & MIPI_DSI_MODE_VIDEO))
>>> return;
>>>
>>> - if (msm_host->power_on) {
>>> + if (msm_host->power_on && msm_host->enabled) {
>>> dsi_wait4video_done(msm_host);
>>> /* delay 4 ms to skip BLLP */
>>> usleep_range(2000, 4000);
>>> @@ -2203,7 +2210,7 @@ int msm_dsi_host_enable(struct mipi_dsi_host
>>> *host)
>>> * pm_runtime_put_autosuspend(&msm_host->pdev->dev);
>>> * }
>>> */
>>> -
>>> + msm_host->enabled = true;
>>> return 0;
>>> }
>>>
>>> @@ -2219,7 +2226,7 @@ int msm_dsi_host_disable(struct mipi_dsi_host
>>> *host)
>>> * Reset to disable video engine so that we can send off cmd.
>>> */
>>> dsi_sw_reset(msm_host);
>>> -
>>> + msm_host->enabled = false;
>>
>> This should go at the start of the function. Also, it's unclear from
>> this patch,
>> but I assume this is protected by a lock?
>>
>> Sean
> [Abhinav] Yes, will move this to the start.
> No, there is no lock here but at this point doesnt need one.
> The reason is that, this variable will be written to and read by the
> same process
> (suspend thread OR resume thread which sends the panel ON/OFF
> commands).
> If we decide to expose other interfaces to send commands like debugfs
> or sysfs and
> introduce more threads, we will add the locking.
[Abhinav] Correction to my prev comment, we do have the
msm_host->cmd_mutex which will
ensure this entire process is protected. That should suffice.
>>
>>
>>> return 0;
>>> }
>>>
>>> --
>>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
>>> Forum,
>>> a Linux Foundation Collaborative Project
>>>
>>> _______________________________________________
>>> Freedreno mailing list
>>> Freedreno@lists.freedesktop.org
>>> https://lists.freedesktop.org/mailman/listinfo/freedreno
> --
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next prev parent reply other threads:[~2018-04-13 22:04 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-07 7:50 [DPU PATCH 1/2] drm/msm/dsi: check video mode engine status before waiting Abhinav Kumar
2018-04-07 7:50 ` [DPU PATCH 2/2] drm/msm/dsi: implement auto PHY timing calculator for 10nm PHY Abhinav Kumar
2018-04-08 8:01 ` Archit Taneja
2018-04-09 15:28 ` [Freedreno] [DPU PATCH 1/2] drm/msm/dsi: check video mode engine status before waiting Jordan Crouse
[not found] ` <20180409152802.GC5491-9PYrDHPZ2Orvke4nUoYGnHL1okKdlPRT@public.gmane.org>
2018-04-09 21:09 ` abhinavk-sgV2jX0FEOL9JmXXK+q4OQ
[not found] ` <1523087405-18877-1-git-send-email-abhinavk-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-04-11 1:54 ` [DPU PATCH v2 " Abhinav Kumar
[not found] ` <1523411647-16840-1-git-send-email-abhinavk-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-04-11 1:54 ` [DPU PATCH v2 2/2] drm/msm/dsi: implement auto PHY timing calculator for 10nm PHY Abhinav Kumar
[not found] ` <1523411647-16840-2-git-send-email-abhinavk-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-04-13 20:29 ` Sean Paul
2018-04-13 20:52 ` abhinavk-sgV2jX0FEOL9JmXXK+q4OQ
[not found] ` <41fb3b8501b466e40a542066b76004c0-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-04-16 17:01 ` Sean Paul
2018-04-13 20:26 ` [DPU PATCH v2 1/2] drm/msm/dsi: check video mode engine status before waiting Sean Paul
2018-04-13 21:10 ` [Freedreno] " abhinavk
[not found] ` <8353aed54639deed0adee6671bbd1895-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-04-13 22:04 ` abhinavk-sgV2jX0FEOL9JmXXK+q4OQ [this message]
[not found] ` <c5c2cbf36c5fabee154eaa03801e71dc-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-04-16 17:07 ` Sean Paul
2018-04-16 17:44 ` abhinavk-sgV2jX0FEOL9JmXXK+q4OQ
[not found] ` <56ad41e7f95e907943a310d9c657ae4d-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-04-16 18:50 ` Sean Paul
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