From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="I0uTW84K" Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B024D6E; Thu, 23 Nov 2023 06:27:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=M6ECVnm5lgJVKodC0naisWfJUSuAnOVd88vm1FjK2XM=; b=I0uTW84KZwen/D/8drpmgWT+jO tsfe8n/9Ooc8sjh12y9g0EpHz4/sDdjvPgmjtt7tAS87ULOgEuYGAv/TOIiweJxQgfq1spPWwD5QW pcKsN9q2rzfa+vW9hMxtj0lM+4vE9SkZ8lnRpdlrQ1Mcno/YIaCvBNIzPeqOjLv1BSBE=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1r6AfZ-00105f-3x; Thu, 23 Nov 2023 15:27:05 +0100 Date: Thu, 23 Nov 2023 15:27:05 +0100 From: Andrew Lunn To: Christian Marangi Cc: Rob Herring , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Krzysztof Kozlowski , Conor Dooley , Andy Gross , Bjorn Andersson , Konrad Dybcio , Heiner Kallweit , Russell King , Florian Fainelli , Broadcom internal kernel review list , Daniel Golle , Qingfang Deng , SkyLake Huang , Matthias Brugger , AngeloGioacchino Del Regno , David Epping , Vladimir Oltean , "Russell King (Oracle)" , Harini Katakam , Simon Horman , Robert Marko , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: Re: [net-next RFC PATCH 03/14] dt-bindings: net: document ethernet PHY package nodes Message-ID: References: <20231120135041.15259-1-ansuelsmth@gmail.com> <20231120135041.15259-4-ansuelsmth@gmail.com> <20231121144244.GA1682395-robh@kernel.org> <655e4939.5d0a0220.d9a9e.0491@mx.google.com> <6a030399-b8ed-4e2c-899f-d82eb437aafa@lunn.ch> <655f2ba9.5d0a0220.294f3.38d8@mx.google.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <655f2ba9.5d0a0220.294f3.38d8@mx.google.com> > Just to be more precise qca807x can operate in 3 different mode: > (this is controlled by the MODE_CFG bits) > - QSGMII: 5 copper port 4 slots over QSGMII, plus the second SERDES is connected to the MAC using SGMII/1000BaseX? > - PSGMII: 5 copper port 5 slots over QSGMII, the second SERDES is idle? > - PSGMII: 4 copper port + 1 combo (that can be both fiber or copper) 5 slots over QSGMII, with the second SERDES connected to an SFP cage. Are ports 1-4 always connected to the P/Q SGMII. Its only port 5 which can use the second SERDES? Does changing between QSGMII and PSGMII really change the protocol run over the multiplex link? The clock rate is slower, there are only 4 multiplexed slots vs five? Or does it keep using PSGMII and leaves one slot I can see how it is messy to validate, if you only have phy-mode. So maybe MODE_CFG is a package property. You then can validate the phy-mode against MODE_CFG. Andrew