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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDE4MDAxOCBTYWx0ZWRfX22sTOHuoY1y7 RYtshydNXlpsMcXhCWsZ7bDC6O+EtKGq32MuAnWU6NzN9Zh2xodak8KVgDmOHWG9/lcZ0xINZ8f FEgqj0NsCYLci+Pq7pyyn1usWKc0iHXGhd5drmv95FX9w341bnIngpoDUz3of8rvZdIW6PkJg8P 2nQ63pHbRRD7UAw/2jEUoDg8V8TRu5n9vx5p//05FULam+9J+tzJ5pj1Ot+ZYvxJcnOrNbTzumc egpBVtH7pcz5H6VMtGXBBKW5rybTFiOt1jk1TFOtbukNEvQyyuo2pU4iS/NigDERJ7wfl1400im Mzd7S0Kvfja0ABCo3gXx6HBxjBofEeZqjEmUI69st/UCQOURfA9hZXwN/WP6lvZNFy1CpnFn8Sd LC53oQ/kGYONRYuC4QGWEp1tagZwQg== X-Authority-Analysis: v=2.4 cv=G4UR0tk5 c=1 sm=1 tr=0 ts=68fb88e5 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=V0jSdCJ6aHfz9AKaKsYA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-GUID: VXSkfxlHqHy81RdU5-zcHeYHfNJ4rEP7 X-Proofpoint-ORIG-GUID: VXSkfxlHqHy81RdU5-zcHeYHfNJ4rEP7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-24_02,2025-10-22_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 priorityscore=1501 spamscore=0 suspectscore=0 adultscore=0 clxscore=1015 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510180018 On 10/24/2025 2:58 PM, Dmitry Baryshkov wrote: > On Fri, Oct 24, 2025 at 04:33:28AM +0530, Akhil P Oommen wrote: >> On 10/22/2025 12:49 AM, Krzysztof Kozlowski wrote: >>> On 21/10/2025 17:51, Akhil P Oommen wrote: >>>> On 10/19/2025 2:43 PM, Krzysztof Kozlowski wrote: >>>>> On 17/10/2025 19:08, Akhil P Oommen wrote: >>>>>> RGMU a.k.a Reduced Graphics Management Unit is a small state machine >>>>>> with the sole purpose of providing IFPC (Inter Frame Power Collapse) >>>>>> support. Compared to GMU, it doesn't manage GPU clock, voltage >>>>>> scaling, bw voting or any other functionalities. All it does is detect >>>>>> an idle GPU and toggle the GDSC switch. As it doesn't access DDR space, >>>>>> it doesn't require iommu. >>>>>> >>>>>> So far, only Adreno 612 GPU has an RGMU core. Document RGMU in the GMU's >>>>>> schema. >>>>>> >>>>>> Signed-off-by: Akhil P Oommen >>>>>> --- >>>>>> .../devicetree/bindings/display/msm/gmu.yaml | 98 +++++++++++++++++----- >>>>>> 1 file changed, 79 insertions(+), 19 deletions(-) >>>>>> >>>>>> @@ -313,13 +360,26 @@ allOf: >>>>>> items: >>>>>> - const: gmu >>>>>> else: >>>>>> - required: >>>>>> - - clocks >>>>>> - - clock-names >>>>>> - - interrupts >>>>>> - - interrupt-names >>>>>> - - iommus >>>>>> - - operating-points-v2 >>>>>> + if: >>>>>> + properties: >>>>>> + compatible: >>>>>> + contains: >>>>>> + const: qcom,adreno-rgmu >>>>>> + then: >>>>>> + required: >>>>>> + - clocks >>>>>> + - clock-names >>>>>> + - interrupts >>>>>> + - interrupt-names >>>>>> + - operating-points-v2 >>>>>> + else: >>>>> >>>>> No. Don't nest multiple ifs. >>>> >>>> I guess we should split this. I will add a 'required' constraint to the >>>> rgmu constraints above. And apply the below 'required' constraint >>>> specifically to 'qcom,adreno-gmu' instead of the 'else' fallback case. >>>> >>>> Please let me know if you have any suggestion. >>> >>> Maybe the binding is getting to complicated and RGMU should have its own. >> >> There is just a single chipset with RGMU and we haven't seen another one >> in the last 8 yrs. So it is very unlikely we will see another one again. >> So I feel it is not worth splitting this file just for RGMU. > > I'd second the suggestion to split the RGMU schema. It's not about the > number of platforms supported by the file. It's about the clarity. I > think it would make the file easier to read. Alright. If there is a general consensus, we can split out RGMU schema to a new file. -Akhil > >> >> Let me send another revision and let's take a call after that. >