From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D564C04AA7 for ; Wed, 20 Sep 2023 15:32:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236650AbjITPdC (ORCPT ); Wed, 20 Sep 2023 11:33:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35208 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235323AbjITPdB (ORCPT ); Wed, 20 Sep 2023 11:33:01 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C21B2B9; Wed, 20 Sep 2023 08:32:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695223974; x=1726759974; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=a7HKqSTQd2pJTS++JjjmKo7EjWkTiEjMiBb8rRIWewA=; b=bVtHmeChnvQLCjZfAAui6+HaKJGG3fFmaxCivMOgYmnuBYsRr0VMV/yn PC3SqFKW4C05w/JnNx+P1c6Z+Ir+OZHqF4ILe5UoSGP2Ype2BqcPHGuBb T7U6V8y2WhTln7N1NJPET5FYQIUOK/G58EVq5Ol56K41v/HPiu2DdCg3H B11irndVd9jlKZNrfO9hduR2dcD83W708Ix+7MzLZPtLLWUpYcBoXDWr/ xg7/1hi4dPpNbQd9p2CAcPcbhLjaMUz62NHU6Uq4pOW0hO9faLRwBYvBX 46yf1+6efe6NEuDpTPbz4+rAALqNO6qNTTq923mdqbICQcagnJv9Fy5yR Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10839"; a="411198688" X-IronPort-AV: E=Sophos;i="6.03,162,1694761200"; d="scan'208";a="411198688" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Sep 2023 08:32:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10839"; a="696337302" X-IronPort-AV: E=Sophos;i="6.03,162,1694761200"; d="scan'208";a="696337302" Received: from conorbyr-mobl1.ger.corp.intel.com (HELO [10.213.199.161]) ([10.213.199.161]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Sep 2023 08:32:48 -0700 Message-ID: Date: Wed, 20 Sep 2023 16:32:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v6 6/6] drm/drm-file: Show finer-grained BO sizes in drm_show_memory_stats Content-Language: en-US To: =?UTF-8?Q?Adri=c3=a1n_Larumbe?= , maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch, robdclark@gmail.com, quic_abhinavk@quicinc.com, dmitry.baryshkov@linaro.org, sean@poorly.run, marijn.suijten@somainline.org, robh@kernel.org, steven.price@arm.com Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, healych@amazon.com, Boris Brezillon , kernel@collabora.com, freedreno@lists.freedesktop.org References: <20230919233556.1458793-1-adrian.larumbe@collabora.com> <20230919233556.1458793-7-adrian.larumbe@collabora.com> From: Tvrtko Ursulin Organization: Intel Corporation UK Plc In-Reply-To: <20230919233556.1458793-7-adrian.larumbe@collabora.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 20/09/2023 00:34, Adrián Larumbe wrote: > The current implementation will try to pick the highest available size > display unit as soon as the BO size exceeds that of the previous > multiplier. That can lead to loss of precision in contexts of low memory > usage. > > The new selection criteria try to preserve precision, whilst also > increasing the display unit selection threshold to render more accurate > values. > > Signed-off-by: Adrián Larumbe > Reviewed-by: Boris Brezillon > Reviewed-by: Steven Price > --- > drivers/gpu/drm/drm_file.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/drm_file.c b/drivers/gpu/drm/drm_file.c > index 762965e3d503..34cfa128ffe5 100644 > --- a/drivers/gpu/drm/drm_file.c > +++ b/drivers/gpu/drm/drm_file.c > @@ -872,6 +872,8 @@ void drm_send_event(struct drm_device *dev, struct drm_pending_event *e) > } > EXPORT_SYMBOL(drm_send_event); > > +#define UPPER_UNIT_THRESHOLD 100 > + > static void print_size(struct drm_printer *p, const char *stat, > const char *region, u64 sz) > { > @@ -879,7 +881,8 @@ static void print_size(struct drm_printer *p, const char *stat, > unsigned u; > > for (u = 0; u < ARRAY_SIZE(units) - 1; u++) { > - if (sz < SZ_1K) > + if ((sz & (SZ_1K - 1)) && IS_ALIGNED worth it at all? > + sz < UPPER_UNIT_THRESHOLD * SZ_1K) > break; Excuse me for a late comment (I was away). I did not get what what is special about a ~10% threshold? Sounds to me just going with the lower unit, when size is not aligned to the higher one, would be better than sometimes precision-sometimes-not. Regards, Tvrtko > sz = div_u64(sz, SZ_1K); > }