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[212.182.62.129]) by smtp.gmail.com with ESMTPSA id k26-20020ac2457a000000b0050f147c0244sm125917lfm.292.2024.01.18.03.22.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 18 Jan 2024 03:22:57 -0800 (PST) Message-ID: Date: Thu, 18 Jan 2024 12:22:56 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 6/6] arm64: dts: qcom: sm6115: declare VLS CLAMP register for USB3 PHY Content-Language: en-US To: Dmitry Baryshkov , Bjorn Andersson , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Jeffrey Hugo Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-phy@lists.infradead.org References: <20240117-usbc-phy-vls-clamp-v2-0-a950c223f10f@linaro.org> <20240117-usbc-phy-vls-clamp-v2-6-a950c223f10f@linaro.org> From: Konrad Dybcio In-Reply-To: <20240117-usbc-phy-vls-clamp-v2-6-a950c223f10f@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 1/17/24 15:04, Dmitry Baryshkov wrote: > The USB3 PHY on the SM6115 platform doesn't have built-in > PCS_MISC_CLAMP_ENABLE register. Instead clamping is handled separately > via the register in the TCSR space. Declare corresponding register. > > Fixes: 9dd5f6dba729 ("arm64: dts: qcom: sm6115: Add USB SS qmp phy node") > Signed-off-by: Dmitry Baryshkov > --- Reviewed-by: Konrad Dybcio Konrad