From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 433C2C48BD7 for ; Thu, 27 Jun 2019 18:15:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 216C120B7C for ; Thu, 27 Jun 2019 18:15:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="Ar1knjtK"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="Y2Q6a7uk" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726576AbfF0SPx (ORCPT ); Thu, 27 Jun 2019 14:15:53 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:38056 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726502AbfF0SPx (ORCPT ); Thu, 27 Jun 2019 14:15:53 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 201FC6021C; Thu, 27 Jun 2019 18:15:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1561659352; bh=2sY4Ndhp5UDd/gnrxUFWqpKzyMzN+O168EA2XIgQnn0=; h=From:To:Cc:Subject:Date:From; b=Ar1knjtKw9ZglU2I04UHeJDHXz0+kJq4ya+eHG9Tx4ZTK8DgRnEVlFrbiXn2LzdWT 1u/VCDhQvdt4xcmta9kud0qq23DcnFyNa4SvWf+cb7mqTdx4nDUa5vSAUSWTn4vPfJ 0J+HjbTJZoiathc+Cyxcjmsr0+UY706tdR72iMEM= Received: from blr-ubuntu-311.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan@codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id BE2EB6021C; Thu, 27 Jun 2019 18:15:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1561659351; bh=2sY4Ndhp5UDd/gnrxUFWqpKzyMzN+O168EA2XIgQnn0=; h=From:To:Cc:Subject:Date:From; b=Y2Q6a7ukyFoqnsbbSWsVTQxVHC2bzJTRnq5E/dcawYHH0vPBEE2f7RWRc9oVmkz52 tfGwfHTNRGYUe9ILBsATJrR/r7FX/xfVtS2ESK/ZPxpnpPb6vT3yzOvbCHdZMRPNr8 vY9TzM02eXaeOmfD1IPGuCfSYJuYes1EFhL2xFJs= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org BE2EB6021C Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=saiprakash.ranjan@codeaurora.org From: Sai Prakash Ranjan To: Mathieu Poirier , Suzuki K Poulose , Rob Herring , devicetree@vger.kernel.org, Leo Yan , Alexander Shishkin , David Brown , Mark Rutland Cc: Rajendra Nayak , Vivek Gautam , Sibi Sankar , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Sai Prakash Ranjan Subject: [PATCHv5 0/2] coresight: Do not default to CPU0 for missing CPU phandle Date: Thu, 27 Jun 2019 23:45:27 +0530 Message-Id: X-Mailer: git-send-email 2.22.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In case of missing CPU phandle, the affinity is set default to CPU0 which is not a correct assumption. Fix this in coresight platform to set affinity to invalid and abort the probe in drivers. Also update the dt-bindings accordingly. v5: * Separate out the dt-bindings patch. v4: * Fix return for !CONFIG_ACPI and !CONFIG_OF. v3: * Addressed review comments from Suzuki and updated acpi_coresight_get_cpu. * Removed patch 2 which had invalid check for online cpus. v2: * Addressed review comments from Suzuki and Mathieu. * Allows the probe of etm and cpu-debug to abort earlier in case of unavailability of respective cpus. Sai Prakash Ranjan (2): dt-bindings: coresight: Change CPU phandle to required property coresight: Do not default to CPU0 for missing CPU phandle .../bindings/arm/coresight-cpu-debug.txt | 4 ++-- .../devicetree/bindings/arm/coresight.txt | 8 +++++--- .../hwtracing/coresight/coresight-cpu-debug.c | 3 +++ drivers/hwtracing/coresight/coresight-etm3x.c | 3 +++ drivers/hwtracing/coresight/coresight-etm4x.c | 3 +++ .../hwtracing/coresight/coresight-platform.c | 20 +++++++++---------- 6 files changed, 26 insertions(+), 15 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation