From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Konrad Dybcio <konradybcio@kernel.org>
Cc: Bjorn Andersson <andersson@kernel.org>,
Rob Clark <robdclark@gmail.com>,
Abhinav Kumar <quic_abhinavk@quicinc.com>,
Akhil P Oommen <quic_akhilpo@quicinc.com>,
Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
Marijn Suijten <marijn.suijten@somainline.org>,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org
Subject: Re: [PATCH RFT v2 13/15] soc: qcom: ubwc: Fix SM6125's ubwc_swizzle value
Date: Thu, 15 May 2025 18:35:59 +0200 [thread overview]
Message-ID: <d0a036e7-605b-4475-8ddc-69482e16f0b3@oss.qualcomm.com> (raw)
In-Reply-To: <4ec678b4-9e69-4ba0-a59d-f2e0948a73ce@oss.qualcomm.com>
On 5/15/25 6:21 PM, Dmitry Baryshkov wrote:
> On 15/05/2025 19:18, Konrad Dybcio wrote:
>> On 5/14/25 10:33 PM, Dmitry Baryshkov wrote:
>>> On 14/05/2025 23:05, Konrad Dybcio wrote:
>>>> On 5/14/25 9:23 PM, Dmitry Baryshkov wrote:
>>>>> On Wed, May 14, 2025 at 05:10:33PM +0200, Konrad Dybcio wrote:
>>>>>> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>>>>>
>>>>>> The value of 7 (a.k.a. GENMASK(2, 0), a.k.a. disabling levels 1-3 of
>>>>>> swizzling) is what we want on this platform (and others with a UBWC
>>>>>> 1.0 encoder).
>>>>>>
>>>>>> Fix it to make mesa happy (the hardware doesn't care about the 2 higher
>>>>>> bits, as they weren't consumed on this platform).
>>>>>>
>>>>>> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>>>>> ---
>>>>>> drivers/soc/qcom/ubwc_config.c | 2 +-
>>>>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>>>>
>>>>>> diff --git a/drivers/soc/qcom/ubwc_config.c b/drivers/soc/qcom/ubwc_config.c
>>>>>> index 9caecd071035ccb03f14464e9b7129ba34a7f862..96b94cf01218cce2dacdba22c7573ba6148fcdd1 100644
>>>>>> --- a/drivers/soc/qcom/ubwc_config.c
>>>>>> +++ b/drivers/soc/qcom/ubwc_config.c
>>>>>> @@ -103,7 +103,7 @@ static const struct qcom_ubwc_cfg_data sm6115_data = {
>>>>>> static const struct qcom_ubwc_cfg_data sm6125_data = {
>>>>>> .ubwc_enc_version = UBWC_1_0,
>>>>>> .ubwc_dec_version = UBWC_3_0,
>>>>>> - .ubwc_swizzle = 1,
>>>>>> + .ubwc_swizzle = 7,
>>>>>> .highest_bank_bit = 14,
>>>>>> };
>>>>>
>>>>> Add a comment and squash into the patch 1.
>>>>
>>>> I don't think that's a good idea, plus this series should be merged
>>>> together anyway
>>>
>>> Well... Granted Rob's comment, I really think the patches should be reordered a bit:
>>>
>>> - MDSS: offset HBB by 13 (patch 2)
>>> - switch drm/msm/mdss and display to common DB (patches 1+3 squashed)
>>> - get a handle (patch 4)
>>> - resolve / simplify (patches 5-10, not squashed)
>>> - fix sm6125 (patch 13)
>>> - WARN_ON (swizzle != swizzle) or (HBB != HBB)
>>> - switch to common R/O config, keeping WARN_ON for the calculated values (with the hope to drop them after testing)
>>
>> Does this bring any functional benefit? This series is unfun to remix
>
> I know the pain.
>
> The functional benefit is to have the WARN_ON and side-by-side comparison of common_ubwc_config vs computed ubwc_config for HBB and swizzle.
HBB I agree, since we'll be outsourcing it to yet another driver, swizzle
should be good enough (tm) - I scanned through the values in the driver
and couldn't find anything wrong just by eye
I realize this sounds funny, but all in all I don't think it's worth the
effort just for that one
Konrad
next prev parent reply other threads:[~2025-05-15 16:36 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-14 15:10 [RFT PATCH v2 00/15] Add a single source of truth for UBWC configuration data Konrad Dybcio
2025-05-14 15:10 ` [PATCH RFT v2 01/15] soc: qcom: Add UBWC config provider Konrad Dybcio
2025-05-14 15:29 ` Konrad Dybcio
2025-05-14 19:03 ` Dmitry Baryshkov
2025-05-15 15:50 ` Konrad Dybcio
2025-05-14 15:10 ` [PATCH RFT v2 02/15] drm/msm: Offset MDSS HBB value by 13 Konrad Dybcio
2025-05-14 19:04 ` Dmitry Baryshkov
2025-05-14 15:10 ` [PATCH RFT v2 03/15] drm/msm: Use the central UBWC config database Konrad Dybcio
2025-05-14 19:05 ` Dmitry Baryshkov
2025-05-15 10:32 ` kernel test robot
2025-05-14 15:10 ` [PATCH RFT v2 04/15] drm/msm/a6xx: Get a handle to the common UBWC config Konrad Dybcio
2025-05-14 15:10 ` [PATCH RFT v2 05/15] drm/msm/a6xx: Resolve the meaning of AMSBC Konrad Dybcio
2025-05-14 19:16 ` Dmitry Baryshkov
2025-05-14 15:10 ` [PATCH RFT v2 06/15] drm/msm/a6xx: Simplify uavflagprd_inv detection Konrad Dybcio
2025-05-14 19:14 ` Dmitry Baryshkov
2025-05-14 15:10 ` [PATCH RFT v2 07/15] drm/msm/a6xx: Resolve the meaning of UBWC_MODE Konrad Dybcio
2025-05-14 19:14 ` Dmitry Baryshkov
2025-05-14 20:02 ` Rob Clark
2025-05-14 15:10 ` [PATCH RFT v2 08/15] drm/msm/a6xx: Replace '2' with BIT(1) in level2_swizzling_dis calc Konrad Dybcio
2025-05-14 19:15 ` Dmitry Baryshkov
2025-05-14 15:10 ` [PATCH RFT v2 09/15] drm/msm/a6xx: Resolve the meaning of rgb565_predicator Konrad Dybcio
2025-05-14 19:15 ` Dmitry Baryshkov
2025-05-14 15:10 ` [PATCH RFT v2 10/15] drm/msm/a6xx: Simplify min_acc_len calculation Konrad Dybcio
2025-05-14 19:19 ` Dmitry Baryshkov
2025-05-15 15:51 ` Konrad Dybcio
2025-05-14 15:10 ` [PATCH RFT v2 11/15] drm/msm/adreno: Switch to the common UBWC config struct Konrad Dybcio
2025-05-14 19:22 ` Dmitry Baryshkov
2025-05-15 15:51 ` Konrad Dybcio
2025-05-14 15:10 ` [PATCH RFT v2 12/15] drm/msm/a6xx: Drop cfg->ubwc_swizzle override Konrad Dybcio
2025-05-14 20:32 ` Dmitry Baryshkov
2025-05-15 15:52 ` Konrad Dybcio
2025-05-14 15:10 ` [PATCH RFT v2 13/15] soc: qcom: ubwc: Fix SM6125's ubwc_swizzle value Konrad Dybcio
2025-05-14 19:23 ` Dmitry Baryshkov
2025-05-14 20:05 ` Konrad Dybcio
2025-05-14 20:33 ` Dmitry Baryshkov
2025-05-15 16:18 ` Konrad Dybcio
2025-05-15 16:21 ` Dmitry Baryshkov
2025-05-15 16:35 ` Konrad Dybcio [this message]
2025-05-15 17:15 ` Dmitry Baryshkov
2025-05-15 17:56 ` Konrad Dybcio
2025-05-15 17:58 ` Dmitry Baryshkov
2025-05-14 15:10 ` [PATCH RFT v2 14/15] soc: qcom: ubwc: Add #defines for UBWC swizzle bits Konrad Dybcio
2025-05-14 19:24 ` Dmitry Baryshkov
2025-05-14 20:09 ` Konrad Dybcio
2025-05-14 20:33 ` Dmitry Baryshkov
2025-05-14 15:10 ` [PATCH RFC RFT v2 15/15] drm/msm/a6xx: Warn if the highest_bank_bit value is overwritten Konrad Dybcio
2025-05-14 19:25 ` Dmitry Baryshkov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d0a036e7-605b-4475-8ddc-69482e16f0b3@oss.qualcomm.com \
--to=konrad.dybcio@oss.qualcomm.com \
--cc=airlied@gmail.com \
--cc=andersson@kernel.org \
--cc=dmitry.baryshkov@oss.qualcomm.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=freedreno@lists.freedesktop.org \
--cc=konradybcio@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=marijn.suijten@somainline.org \
--cc=quic_abhinavk@quicinc.com \
--cc=quic_akhilpo@quicinc.com \
--cc=robdclark@gmail.com \
--cc=sean@poorly.run \
--cc=simona@ffwll.ch \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox