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From: Taniya Das <taniya.das@oss.qualcomm.com>
To: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>
Cc: Konrad Dybcio <konradybcio@kernel.org>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Abel Vesa <abel.vesa@linaro.org>,
	linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH 2/2] clk: qcom: gcc-sm8650: Use floor ops for SDCC RCGs
Date: Tue, 25 Nov 2025 12:07:17 +0530	[thread overview]
Message-ID: <d156efb4-ef41-47eb-8f55-2c5ab5d97e3b@oss.qualcomm.com> (raw)
In-Reply-To: <20251124212012.3660189-3-vladimir.zapolskiy@linaro.org>



On 11/25/2025 2:50 AM, Vladimir Zapolskiy wrote:
> In line with commit a27ac3806b0a ("clk: qcom: gcc-sm8450: Use floor ops
> for SDCC RCGs") done to fix issues with overclocked SD cards on SM8450
> powered boards set floor clock operations for SDCC RCGs on SM8650.
> 
> This change fixes initialization of some SD cards, where the problem
> is manifested by the SDHC driver:
> 
>     mmc0: Card appears overclocked; req 50000000 Hz, actual 100000000 Hz
>     mmc0: error -110 whilst initialising SD card
> 
> Fixes: c58225b7e3d7 ("clk: qcom: add the SM8650 Global Clock Controller driver, part 1")
> Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
> ---
>  drivers/clk/qcom/gcc-sm8650.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/qcom/gcc-sm8650.c b/drivers/clk/qcom/gcc-sm8650.c
> index 24f98062b9dd..2dd6444ce036 100644
> --- a/drivers/clk/qcom/gcc-sm8650.c
> +++ b/drivers/clk/qcom/gcc-sm8650.c
> @@ -1257,7 +1257,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = {
>  		.parent_data = gcc_parent_data_11,
>  		.num_parents = ARRAY_SIZE(gcc_parent_data_11),
>  		.flags = CLK_SET_RATE_PARENT,
> -		.ops = &clk_rcg2_shared_ops,
> +		.ops = &clk_rcg2_shared_floor_ops,
>  	},
>  };
>  
> @@ -1279,7 +1279,7 @@ static struct clk_rcg2 gcc_sdcc4_apps_clk_src = {
>  		.parent_data = gcc_parent_data_0,
>  		.num_parents = ARRAY_SIZE(gcc_parent_data_0),
>  		.flags = CLK_SET_RATE_PARENT,
> -		.ops = &clk_rcg2_shared_ops,
> +		.ops = &clk_rcg2_shared_floor_ops,
>  	},
>  };
>  


Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>


-- 
Thanks,
Taniya Das


  reply	other threads:[~2025-11-25  6:37 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-24 21:20 [PATCH 0/2] clk: qcom: gcc-sm8x50: Use floor ops for SDCC RCGs Vladimir Zapolskiy
2025-11-24 21:20 ` [PATCH 1/2] clk: qcom: gcc-sm8550: " Vladimir Zapolskiy
2025-11-25  6:36   ` Taniya Das
2025-11-25  7:06   ` Neil Armstrong
2025-11-24 21:20 ` [PATCH 2/2] clk: qcom: gcc-sm8650: " Vladimir Zapolskiy
2025-11-25  6:37   ` Taniya Das [this message]
2025-11-25  7:06   ` Neil Armstrong
2026-01-05 14:07 ` [PATCH 0/2] clk: qcom: gcc-sm8x50: " Bjorn Andersson

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