[PATCH v4 3/3] soundwire: qcom: check clk_prepare_enable() return values

[Daniel Carter <yass27106@gmail.com>]

clk_prepare_enable() can fail; unchecked, the driver proceeds to
touch registers with the interface clock off, which aborts on arm64.
Check the return value in the interrupt handler (returning IRQ_NONE,
as the interrupt status is not read or cleared on that path), in
probe, and in the runtime resume path (returning the error without
unmasking the level-high wake IRQ, which would storm while the slave
keeps driving the line).

Fixes: 02efb49aa805 ("soundwire: qcom: add support for SoundWire controller")
Fixes: 74e79da9fd46 ("soundwire: qcom: add runtime pm support")
Signed-off-by: Daniel Carter <yass27106@gmail.com>
---
 drivers/soundwire/qcom.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c
index 6e0c5fb10ef..62a44f64dd8 100644
--- a/drivers/soundwire/qcom.c
+++ b/drivers/soundwire/qcom.c
@@ -778,7 +778,9 @@ static irqreturn_t qcom_swrm_irq_handler(int irq, void *dev_id)
 	u32 i;
 	int devnum;
 	int ret = IRQ_HANDLED;
-	clk_prepare_enable(ctrl->hclk);
+
+	if (clk_prepare_enable(ctrl->hclk))
+		return IRQ_NONE;
 
 	ctrl->reg_read(ctrl, ctrl->reg_layout[SWRM_REG_INTERRUPT_STATUS],
 		       &intr_sts);
@@ -1675,7 +1677,11 @@ static int qcom_swrm_probe(struct platform_device *pdev)
 		goto err_init;
 	}
 
-	clk_prepare_enable(ctrl->hclk);
+	ret = clk_prepare_enable(ctrl->hclk);
+	if (ret) {
+		dev_err(dev, "unable to enable iface clock\n");
+		goto err_init;
+	}
 
 	ctrl->dev = dev;
 	dev_set_drvdata(&pdev->dev, ctrl);
@@ -1800,7 +1806,9 @@ static int __maybe_unused swrm_runtime_resume(struct device *dev)
 			disable_irq_nosync(ctrl->wake_irq);
 	}
 
-	clk_prepare_enable(ctrl->hclk);
+	ret = clk_prepare_enable(ctrl->hclk);
+	if (ret)
+		return ret;
 
 	if (ctrl->clock_stop_not_supported) {
 		reinit_completion(&ctrl->enumeration);
-- 
2.55.0