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[212.182.62.129]) by smtp.gmail.com with ESMTPSA id p10-20020a2e804a000000b002d0bf097af1sm53315ljg.123.2024.03.14.02.18.30 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 14 Mar 2024 02:18:33 -0700 (PDT) Message-ID: Date: Thu, 14 Mar 2024 10:18:29 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/3] arm64: dts: qcom: apq8016: Add Schneider HMIBSC board DTS To: Sumit Garg Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, stephan@gerhold.net, caleb.connolly@linaro.org, neil.armstrong@linaro.org, laetitia.mariottini@se.com, pascal.eberhard@se.com, abdou.saker@se.com, jimmy.lalande@se.com, benjamin.missey@non.se.com, daniel.thompson@linaro.org, linux-kernel@vger.kernel.org, Jagdish Gediya References: <20240313123017.362570-1-sumit.garg@linaro.org> <20240313123017.362570-4-sumit.garg@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 3/14/24 10:04, Sumit Garg wrote: > Hi Konrad, > > On Wed, 13 Mar 2024 at 18:34, Konrad Dybcio wrote: >> >> >> >> On 3/13/24 13:30, Sumit Garg wrote: >>> Add Schneider Electric HMIBSC board DTS. The HMIBSC board is an IIoT Edge >>> Box Core board based on the Qualcomm APQ8016E SoC. >>> >>> Support for Schneider Electric HMIBSC. Features: >>> - Qualcomm Snapdragon 410C SoC - APQ8016 (4xCortex A53, Adreno 306) >>> - 1GiB RAM >>> - 8GiB eMMC, SD slot >>> - WiFi and Bluetooth >>> - 2x Host, 1x Device USB port >>> - HDMI >>> - Discrete TPM2 chip over SPI >>> - USB ethernet adaptors (soldered) >>> >>> Co-developed-by: Jagdish Gediya >>> Signed-off-by: Jagdish Gediya >>> Signed-off-by: Sumit Garg >>> --- >> >> [...] >> >>> + memory@80000000 { >>> + reg = <0 0x80000000 0 0x40000000>; >>> + }; >> >> I'm not sure the entirety of DRAM is accessible.. >> >> This override should be unnecessary, as bootloaders generally update >> the size field anyway. > > On this board, U-Boot is used as the first stage bootloader (replacing > Little Kernel (LK), thanks to Stephan's work). And U-Boot consumes > memory range from DT as Linux does but doesn't require any memory to > be reserved for U-Boot itself. So apart from reserved memory nodes > explicitly described in DT all the other DRAM regions are accessible. Still, u-boot has code to fetch the size dynamically, no? [...] >> >>> + >>> + compatible = "adi,adv7533"; >>> + reg = <0x39>; >>> + >>> + interrupt-parent = <&tlmm>; >>> + interrupts = <31 IRQ_TYPE_EDGE_FALLING>; >> >> interrupts-extended >> > > Please see Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml. Okay, and what am I supposed to see there? Konrad