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Thu, 02 Jan 2025 06:08:48 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 50268lHT030800 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 2 Jan 2025 06:08:47 GMT Received: from [10.152.195.140] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 1 Jan 2025 22:08:42 -0800 Message-ID: Date: Thu, 2 Jan 2025 11:38:39 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/4] arm64: dts: qcom: ipq5424: Enable PCIe PHYs and controllers To: Konrad Dybcio , , , , , , , , , , , , , , , , CC: , References: <20241213134950.234946-1-quic_mmanikan@quicinc.com> <20241213134950.234946-5-quic_mmanikan@quicinc.com> Content-Language: en-US From: Manikanta Mylavarapu In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: lfQq-CHW-M3dcK6cu3U_ienmjoyz1sBb X-Proofpoint-ORIG-GUID: lfQq-CHW-M3dcK6cu3U_ienmjoyz1sBb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 malwarescore=0 suspectscore=0 impostorscore=0 mlxlogscore=837 mlxscore=0 spamscore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501020052 On 12/13/2024 8:37 PM, Konrad Dybcio wrote: > On 13.12.2024 2:49 PM, Manikanta Mylavarapu wrote: >> Enable the PCIe controller and PHY nodes corresponding to RDP466. >> >> Signed-off-by: Manikanta Mylavarapu >> --- > > >> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 43 +++++++++++++++++++++ >> 1 file changed, 43 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> index d4d31026a026..8857b64df1be 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts >> @@ -45,6 +45,26 @@ data-pins { >> bias-pull-up; >> }; >> }; >> + >> + pcie2_default_state: pcie2-default-state { >> + perst-n-pins { >> + pins = "gpio31"; >> + function = "gpio"; >> + drive-strength = <8>; >> + bias-pull-up; >> + output-low; >> + }; >> + }; > > Drop the inner wrapper, in both definitions /\ \/ > > Konrad > Okay, sure. Thanks & Regards, Manikanta.