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[83.9.3.225]) by smtp.gmail.com with ESMTPSA id d7-20020ac24c87000000b004eae8c74fffsm495372lfl.66.2023.03.31.12.41.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 31 Mar 2023 12:41:32 -0700 (PDT) Message-ID: Date: Fri, 31 Mar 2023 21:41:30 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH 1/2] ARM: dts: qcom: sdx55: Move reset and wake gpios to board dts To: Manivannan Sadhasivam , andersson@kernel.org Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230331145915.11653-1-manivannan.sadhasivam@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20230331145915.11653-1-manivannan.sadhasivam@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 31.03.2023 16:59, Manivannan Sadhasivam wrote: > The reset and wake properties in the PCIe EP node belong to the board dts > as they can be customized per board design. So let's move them from SoC > dtsi. > > Signed-off-by: Manivannan Sadhasivam > --- Reviewed-by: Konrad Dybcio On a note, is PCIe not connected to anything on the SDX55 MTP? Konrad > arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts | 3 +++ > arch/arm/boot/dts/qcom-sdx55.dtsi | 2 -- > 2 files changed, 3 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts b/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts > index 81f33eba39e5..b73b707342af 100644 > --- a/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts > +++ b/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts > @@ -255,6 +255,9 @@ &pcie_ep { > pinctrl-names = "default"; > pinctrl-0 = <&pcie_ep_clkreq_default &pcie_ep_perst_default > &pcie_ep_wake_default>; > + > + reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>; > + wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>; > }; > > &qpic_bam { > diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi > index 286fa92da428..bc310ed01b40 100644 > --- a/arch/arm/boot/dts/qcom-sdx55.dtsi > +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi > @@ -421,8 +421,6 @@ pcie_ep: pcie-ep@1c00000 { > ; > interrupt-names = "global", > "doorbell"; > - reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>; > - wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>; > resets = <&gcc GCC_PCIE_BCR>; > reset-names = "core"; > power-domains = <&gcc PCIE_GDSC>;