From: Stephen Boyd <sboyd@kernel.org>
To: Mohammad Rafi Shaik <quic_mohs@quicinc.com>,
agross@kernel.org, andersson@kernel.org, broonie@kernel.org,
konrad.dybcio@somainline.org, krzysztof.kozlowski+dt@linaro.org,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, mturquette@baylibre.com,
quic_plai@quicinc.com, quic_rohkumar@quicinc.com,
quic_visr@quicinc.com, robh+dt@kernel.org, swboyd@chromium.org
Cc: Mohammad Rafi Shaik <quic_mohs@quicinc.com>
Subject: Re: [PATCH v10 0/3] Add resets for ADSP based audio clock controller driver
Date: Fri, 31 Mar 2023 11:48:08 -0700 [thread overview]
Message-ID: <dc11a5959578c7366e30fba96794cc23.sboyd@kernel.org> (raw)
In-Reply-To: <20230331152805.3199968-1-quic_mohs@quicinc.com>
Quoting Mohammad Rafi Shaik (2023-03-31 08:28:02)
> Add resets and remove qdsp6ss clock controller for audioreach based platforms.
Does this supersede the v1 patch series[1]?
>
> Changes since v9:
> -- Drop "clk: qcom: lpassaudiocc-sc7280: Modify qcom_cc_probe" patch.
> -- Update Fixes tag in Add the required gdsc's in lpass_cc_sc7280_desc patch.
> -- Add the max_register value in Skip qdsp6ss clock registration patch.
[1] https://lore.kernel.org/linux-clk/20230327163249.1081824-1-quic_mohs@quicinc.com/
prev parent reply other threads:[~2023-03-31 18:48 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-31 15:28 [PATCH v10 0/3] Add resets for ADSP based audio clock controller driver Mohammad Rafi Shaik
2023-03-31 15:28 ` [PATCH v10 1/3] dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property Mohammad Rafi Shaik
2023-03-31 15:28 ` [PATCH v10 2/3] clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration Mohammad Rafi Shaik
2023-03-31 18:46 ` Stephen Boyd
2023-04-03 6:39 ` Mohammad Rafi Shaik
2023-03-31 15:28 ` [PATCH v10 3/3] clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc Mohammad Rafi Shaik
2023-03-31 18:48 ` Stephen Boyd [this message]
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