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[83.9.1.37]) by smtp.gmail.com with ESMTPSA id b8-20020a2e9888000000b0029571d505a1sm774904ljj.80.2023.04.07.04.59.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 07 Apr 2023 04:59:17 -0700 (PDT) Message-ID: Date: Fri, 7 Apr 2023 13:59:15 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Subject: Re: [PATCH V3 5/5] arm64: dts: qcom: ipq9574: Add cpufreq support To: Devi Priya , agross@kernel.org, andersson@kernel.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: quic_srichara@quicinc.com, quic_sjaganat@quicinc.com, quic_kathirav@quicinc.com, quic_arajkuma@quicinc.com, quic_anusha@quicinc.com, quic_ipkumar@quicinc.com References: <20230406070032.22243-1-quic_devipriy@quicinc.com> <20230406070032.22243-6-quic_devipriy@quicinc.com> <18eb5708-bf51-26c3-51a0-70a5069ffdbe@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 7.04.2023 06:53, Devi Priya wrote: > > > On 4/7/2023 1:21 AM, Konrad Dybcio wrote: >> >> >> On 6.04.2023 09:00, Devi Priya wrote: >>> Add cpu freq nodes in the device tree to bump cpu frequency above 800MHz. >>> >>> Co-developed-by: Praveenkumar I >>> Signed-off-by: Praveenkumar I >>> Signed-off-by: Devi Priya >>> --- >>>   Changes in V3: >>>     - No change >>> >>>   arch/arm64/boot/dts/qcom/ipq9574.dtsi | 58 +++++++++++++++++++++++++++ >>>   1 file changed, 58 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi >>> index 1f9b7529e7ed..cfef87b5fd22 100644 >>> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi >>> @@ -6,6 +6,7 @@ >>>    * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. >>>    */ >>>   +#include >>>   #include >>>   #include >>>   #include >>> @@ -37,6 +38,10 @@ >>>               reg = <0x0>; >>>               enable-method = "psci"; >>>               next-level-cache = <&L2_0>; >>> +            clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; >>> +            clock-names = "cpu"; >>> +            operating-points-v2 = <&cpu_opp_table>; >>> +            cpu-supply = <&ipq9574_s1>; >>>           }; >>>             CPU1: cpu@1 { >>> @@ -45,6 +50,10 @@ >>>               reg = <0x1>; >>>               enable-method = "psci"; >>>               next-level-cache = <&L2_0>; >>> +            clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; >>> +            clock-names = "cpu"; >>> +            operating-points-v2 = <&cpu_opp_table>; >>> +            cpu-supply = <&ipq9574_s1>; >>>           }; >>>             CPU2: cpu@2 { >>> @@ -53,6 +62,10 @@ >>>               reg = <0x2>; >>>               enable-method = "psci"; >>>               next-level-cache = <&L2_0>; >>> +            clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; >>> +            clock-names = "cpu"; >>> +            operating-points-v2 = <&cpu_opp_table>; >>> +            cpu-supply = <&ipq9574_s1>; >>>           }; >>>             CPU3: cpu@3 { >>> @@ -61,6 +74,10 @@ >>>               reg = <0x3>; >>>               enable-method = "psci"; >>>               next-level-cache = <&L2_0>; >>> +            clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; >>> +            clock-names = "cpu"; >>> +            operating-points-v2 = <&cpu_opp_table>; >>> +            cpu-supply = <&ipq9574_s1>; >>>           }; >>>             L2_0: l2-cache { >>> @@ -75,6 +92,47 @@ >>>           reg = <0x0 0x40000000 0x0 0x0>; >>>       }; >>>   +    cpu_opp_table: opp-table-cpu { >> This is not sorted properly. It should probably come >> after memory alphabetically ('o' > 'm') >> > Yes, But I see that opp-table-cpu node is already placed after > memory@40000000 Oh you're right, the diff doesn't really show that very well and I didn't notice.. Reviewed-by: Konrad Dybcio Konrad >> Konrad >>> +        compatible = "operating-points-v2"; >>> +        opp-shared; >>> + >>> +        opp-936000000 { >>> +            opp-hz = /bits/ 64 <936000000>; >>> +            opp-microvolt = <725000>; >>> +            clock-latency-ns = <200000>; >>> +        }; >>> + >>> +        opp-1104000000 { >>> +            opp-hz = /bits/ 64 <1104000000>; >>> +            opp-microvolt = <787500>; >>> +            clock-latency-ns = <200000>; >>> +        }; >>> + >>> +        opp-1416000000 { >>> +            opp-hz = /bits/ 64 <1416000000>; >>> +            opp-microvolt = <862500>; >>> +            clock-latency-ns = <200000>; >>> +        }; >>> + >>> +        opp-1488000000 { >>> +            opp-hz = /bits/ 64 <1488000000>; >>> +            opp-microvolt = <925000>; >>> +            clock-latency-ns = <200000>; >>> +        }; >>> + >>> +        opp-1800000000 { >>> +            opp-hz = /bits/ 64 <1800000000>; >>> +            opp-microvolt = <987500>; >>> +            clock-latency-ns = <200000>; >>> +        }; >>> + >>> +        opp-2208000000 { >>> +            opp-hz = /bits/ 64 <2208000000>; >>> +            opp-microvolt = <1062500>; >>> +            clock-latency-ns = <200000>; >>> +        }; >>> +    }; >>> + >>>       firmware { >>>           scm { >>>               compatible = "qcom,scm-ipq9574", "qcom,scm"; > Best Regards, > Devi Priya