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([2a01:e0a:982:cbb0:1485:2a78:787c:c669]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385ccd2db16sm11800899f8f.21.2024.12.02.00.41.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 02 Dec 2024 00:41:06 -0800 (PST) Message-ID: Date: Mon, 2 Dec 2024 09:41:06 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Neil Armstrong Reply-To: neil.armstrong@linaro.org Subject: Re: [PATCH v3 2/7] drm/msm: adreno: add plumbing to generate bandwidth vote table for GMU To: Konrad Dybcio , Rob Clark , Sean Paul , Konrad Dybcio , Abhinav Kumar , Dmitry Baryshkov , Marijn Suijten , David Airlie , Simona Vetter , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Akhil P Oommen Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20241128-topic-sm8x50-gpu-bw-vote-v3-0-81d60c10fb73@linaro.org> <20241128-topic-sm8x50-gpu-bw-vote-v3-2-81d60c10fb73@linaro.org> <0dabac7a-bc7e-4075-86ed-3d4c25908ffb@oss.qualcomm.com> Content-Language: en-US, fr Autocrypt: addr=neil.armstrong@linaro.org; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 29/11/2024 16:21, Konrad Dybcio wrote: > On 28.11.2024 11:25 AM, Neil Armstrong wrote: >> The Adreno GPU Management Unit (GMU) can also scale DDR Bandwidth along >> the Frequency and Power Domain level, but by default we leave the >> OPP core scale the interconnect ddr path. >> >> While scaling via the interconnect path was sufficient, newer GPUs >> like the A750 requires specific vote paremeters and bandwidth to >> achieve full functionality. >> >> In order to calculate vote values used by the GPU Management >> Unit (GMU), we need to parse all the possible OPP Bandwidths and >> create a vote value to be sent to the appropriate Bus Control >> Modules (BCMs) declared in the GPU info struct. >> >> This vote value is called IB, while on the othe side the GMU also >> takes another vote called AB which is a 16bit quantized value >> of the bandwidth against the maximum supported bandwidth. >> >> The vote array will then be used to dynamically generate the GMU >> bw_table sent during the GMU power-up. >> >> Signed-off-by: Neil Armstrong >> --- >> drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 174 ++++++++++++++++++++++++++++++++++ >> drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 14 +++ >> drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 + >> drivers/gpu/drm/msm/adreno/a6xx_hfi.h | 5 + >> 4 files changed, 194 insertions(+) >> >> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c >> index 14db7376c712d19446b38152e480bd5a1e0a5198..ee2010a01186721dd377f1655fcf05ddaff77131 100644 >> --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c >> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c >> @@ -9,6 +9,7 @@ >> #include >> #include >> #include >> +#include >> #include >> >> #include "a6xx_gpu.h" >> @@ -1287,6 +1288,131 @@ static int a6xx_gmu_memory_probe(struct a6xx_gmu *gmu) >> return 0; >> } >> >> +/** >> + * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager (BCM) >> + * @unit: divisor used to convert bytes/sec bw value to an RPMh msg >> + * @width: multiplier used to convert bytes/sec bw value to an RPMh msg >> + * @vcd: virtual clock domain that this bcm belongs to >> + * @reserved: reserved field >> + */ >> +struct bcm_db { >> + __le32 unit; >> + __le16 width; >> + u8 vcd; >> + u8 reserved; >> +}; >> + >> +static u64 bcm_div(u64 num, u32 base) >> +{ >> + /* Ensure that small votes aren't lost. */ >> + if (num && num < base) >> + return 1; >> + >> + do_div(num, base); >> + >> + return num; >> +} > > This should live in include/soc/qcom/bcm.h, similarly to tcs.h in > that directory Honestly, I don't think so, there's no bcm specific logic here, we simply avoid returning 0 after a division > >> +static int a6xx_gmu_rpmh_bw_votes_init(const struct a6xx_info *info, >> + struct a6xx_gmu *gmu) >> +{ >> + const struct bcm_db *bcm_data[GMU_MAX_BCMS] = { 0 }; >> + unsigned int bcm_index, bw_index, bcm_count = 0; >> + >> + if (!info->bcms) >> + return 0; >> + >> + /* Retrieve BCM data from cmd-db */ >> + for (bcm_index = 0; bcm_index < GMU_MAX_BCMS; bcm_index++) { >> + size_t count; >> + >> + /* Stop at first unconfigured bcm */ >> + if (!info->bcms[bcm_index].name) >> + break; >> + >> + bcm_data[bcm_index] = cmd_db_read_aux_data( >> + info->bcms[bcm_index].name, >> + &count); >> + if (IS_ERR(bcm_data[bcm_index])) >> + return PTR_ERR(bcm_data[bcm_index]); >> + >> + if (!count) >> + return -EINVAL; >> + >> + ++bcm_count; >> + } >> + >> + /* Generate BCM votes values for each bandwidth & BCM */ >> + for (bw_index = 0; bw_index < gmu->nr_gpu_bws; bw_index++) { >> + u32 *data = gmu->gpu_ib_votes[bw_index]; >> + u32 bw = gmu->gpu_bw_table[bw_index]; >> + >> + /* Calculations loosely copied from bcm_aggregate() & tcs_cmd_gen() */ > > Ditto, perhaps this should be exported from icc I think it's a bad idea to share code because the overall structures and purposes are completely different, and it will make the gpu maintenance a nightmare. > > [...] > > Konrad Thanks, Neil