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([2a01:e0a:982:cbb0:e2ce:628f:fe98:a052]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38c5c1b61f1sm13142299f8f.68.2025.02.03.06.23.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 03 Feb 2025 06:23:14 -0800 (PST) Message-ID: Date: Mon, 3 Feb 2025 15:23:13 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: neil.armstrong@linaro.org Reply-To: neil.armstrong@linaro.org Subject: Re: [PATCH] ASoC: qcom: sc8280xp: enable primary mi2s To: Danila Tikhonov , srinivas.kandagatla@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, perex@perex.cz, tiwai@suse.com Cc: linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux@mainlining.org, ~postmarketos/upstreaming@lists.sr.ht References: <20250203113857.34728-1-danila@jiaxyga.com> Content-Language: en-US, fr Autocrypt: addr=neil.armstrong@linaro.org; keydata= xsBNBE1ZBs8BCAD78xVLsXPwV/2qQx2FaO/7mhWL0Qodw8UcQJnkrWmgTFRobtTWxuRx8WWP GTjuhvbleoQ5Cxjr+v+1ARGCH46MxFP5DwauzPekwJUD5QKZlaw/bURTLmS2id5wWi3lqVH4 BVF2WzvGyyeV1o4RTCYDnZ9VLLylJ9bneEaIs/7cjCEbipGGFlfIML3sfqnIvMAxIMZrvcl9 qPV2k+KQ7q+aXavU5W+yLNn7QtXUB530Zlk/d2ETgzQ5FLYYnUDAaRl+8JUTjc0CNOTpCeik 80TZcE6f8M76Xa6yU8VcNko94Ck7iB4vj70q76P/J7kt98hklrr85/3NU3oti3nrIHmHABEB AAHNKk5laWwgQXJtc3Ryb25nIDxuZWlsLmFybXN0cm9uZ0BsaW5hcm8ub3JnPsLAkQQTAQoA OwIbIwULCQgHAwUVCgkICwUWAgMBAAIeAQIXgBYhBInsPQWERiF0UPIoSBaat7Gkz/iuBQJk Q5wSAhkBAAoJEBaat7Gkz/iuyhMIANiD94qDtUTJRfEW6GwXmtKWwl/mvqQtaTtZID2dos04 YqBbshiJbejgVJjy+HODcNUIKBB3PSLaln4ltdsV73SBcwUNdzebfKspAQunCM22Mn6FBIxQ GizsMLcP/0FX4en9NaKGfK6ZdKK6kN1GR9YffMJd2P08EO8mHowmSRe/ExAODhAs9W7XXExw UNCY4pVJyRPpEhv373vvff60bHxc1k/FF9WaPscMt7hlkbFLUs85kHtQAmr8pV5Hy9ezsSRa GzJmiVclkPc2BY592IGBXRDQ38urXeM4nfhhvqA50b/nAEXc6FzqgXqDkEIwR66/Gbp0t3+r yQzpKRyQif3OwE0ETVkGzwEIALyKDN/OGURaHBVzwjgYq+ZtifvekdrSNl8TIDH8g1xicBYp QTbPn6bbSZbdvfeQPNCcD4/EhXZuhQXMcoJsQQQnO4vwVULmPGgtGf8PVc7dxKOeta+qUh6+ SRh3vIcAUFHDT3f/Zdspz+e2E0hPV2hiSvICLk11qO6cyJE13zeNFoeY3ggrKY+IzbFomIZY 4yG6xI99NIPEVE9lNBXBKIlewIyVlkOaYvJWSV+p5gdJXOvScNN1epm5YHmf9aE2ZjnqZGoM Mtsyw18YoX9BqMFInxqYQQ3j/HpVgTSvmo5ea5qQDDUaCsaTf8UeDcwYOtgI8iL4oHcsGtUX oUk33HEAEQEAAcLAXwQYAQIACQUCTVkGzwIbDAAKCRAWmrexpM/4rrXiB/sGbkQ6itMrAIfn M7IbRuiSZS1unlySUVYu3SD6YBYnNi3G5EpbwfBNuT3H8//rVvtOFK4OD8cRYkxXRQmTvqa3 3eDIHu/zr1HMKErm+2SD6PO9umRef8V82o2oaCLvf4WeIssFjwB0b6a12opuRP7yo3E3gTCS KmbUuLv1CtxKQF+fUV1cVaTPMyT25Od+RC1K+iOR0F54oUJvJeq7fUzbn/KdlhA8XPGzwGRy 4zcsPWvwnXgfe5tk680fEKZVwOZKIEuJC3v+/yZpQzDvGYJvbyix0lHnrCzq43WefRHI5XTT QbM0WUIBIcGmq38+OgUsMYu4NzLu7uZFAcmp6h8g Organization: Linaro In-Reply-To: <20250203113857.34728-1-danila@jiaxyga.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 03/02/2025 12:38, Danila Tikhonov wrote: > When using primary mi2s on sc8280xp-compatible SoCs, the correct clock > needs to get enabled to be able to use the mi2s interface. > > Signed-off-by: Danila Tikhonov > --- > sound/soc/qcom/sc8280xp.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/sound/soc/qcom/sc8280xp.c b/sound/soc/qcom/sc8280xp.c > index 311377317176..03687de1ebb0 100644 > --- a/sound/soc/qcom/sc8280xp.c > +++ b/sound/soc/qcom/sc8280xp.c > @@ -14,6 +14,8 @@ > #include "common.h" > #include "sdw.h" > > +#define MI2S_BCLK_RATE 1536000 > + > struct sc8280xp_snd_data { > bool stream_prepared[AFE_PORT_MAX]; > struct snd_soc_card *card; > @@ -25,13 +27,24 @@ struct sc8280xp_snd_data { > > static int sc8280xp_snd_init(struct snd_soc_pcm_runtime *rtd) > { > + unsigned int codec_dai_fmt = SND_SOC_DAIFMT_BC_FC; > + unsigned int fmt = SND_SOC_DAIFMT_BP_FP; > struct sc8280xp_snd_data *data = snd_soc_card_get_drvdata(rtd->card); > + struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0); > struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0); > struct snd_soc_card *card = rtd->card; > struct snd_soc_jack *dp_jack = NULL; > int dp_pcm_id = 0; > > switch (cpu_dai->id) { > + case PRIMARY_MI2S_RX: > + codec_dai_fmt |= SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_I2S; > + snd_soc_dai_set_sysclk(cpu_dai, > + Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT, > + MI2S_BCLK_RATE, SNDRV_PCM_STREAM_PLAYBACK); How is this possible ? sc8280xp uses the q6prm clock driver, and there's no way this call sets the Q6PRM_LPASS_CLK_ID_PRI_MI2S_IBIT, or I totally missed something. And prm is neither a dai nor has the set_sysclk callback. Neil > + snd_soc_dai_set_fmt(cpu_dai, fmt); > + snd_soc_dai_set_fmt(codec_dai, codec_dai_fmt); > + break; > case WSA_CODEC_DMA_RX_0: > case WSA_CODEC_DMA_RX_1: > /*