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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29498d274aasm63274935ad.56.2025.10.26.20.17.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 26 Oct 2025 20:17:45 -0700 (PDT) Message-ID: Date: Mon, 27 Oct 2025 11:17:38 +0800 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 1/2] arm64: dts: qcom: sm6150: Add gpr node To: Konrad Dybcio , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@oss.qualcomm.com References: <20251024023720.3928547-1-le.qi@oss.qualcomm.com> <20251024023720.3928547-2-le.qi@oss.qualcomm.com> Content-Language: en-US From: Le Qi In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDI3MDAyOCBTYWx0ZWRfXygp6e/CK8FXe S37Q5dXcgOzG0IfRgEdSYHyQSaaqJcBGhWQ81N9F/+hZpSVYHv44reUAOpKxJL1M+u1mp5E1YLN USIaSy6rs0ZlYM4Iv0rj/qPeRpZeFkhAGsUOlOjniTToTrEL18+SLWXlmND/hWy8GVt9mPXTl6P Jyr9Sd2DhZzfKU2m7b/Wb5DGEv5M5c03Qk/WKXY0jYKGAMQHu6Wqtbwu/tKTkIheRWZAtpZ38KC 29p6VCkzYL96IQg7VaJIpbL5BnZ82MhhCztbUpZ9JxXd+MDf2gBiIxl+oBkTWxxsvRgP6lGDm12 MgrYQZFxahNL9VsgLFErWGf/xJiHEvsQGtH/R6a0FgejCwRGowTfHVQ6/KJGOAUq9lg0Ad2fQ23 CYpvrhRqp1dCAqJQUQBCE5OoG+OuZw== X-Proofpoint-ORIG-GUID: UCtkIMwAzWcmALf_jmVpzdRb7ODCxy0k X-Proofpoint-GUID: UCtkIMwAzWcmALf_jmVpzdRb7ODCxy0k X-Authority-Analysis: v=2.4 cv=WqMm8Nfv c=1 sm=1 tr=0 ts=68fee45b cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=lSFguUpnHfwc5t4ioxcA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-27_02,2025-10-22_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 impostorscore=0 spamscore=0 phishscore=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510020000 definitions=main-2510270028 On 10/24/2025 4:13 PM, Konrad Dybcio wrote: > On 10/24/25 4:37 AM, Le Qi wrote: >> Add GPR(Generic Pack router) node along with >> APM(Audio Process Manager) and PRM(Proxy resource >> Manager) audio services. > > This is a really weird > way of breaking your message that makes > it difficult to read > > (stick to something more like 72 characters, please) Thanks, will modify this in next patch. > >> >> Signed-off-by: Le Qi >> --- >> arch/arm64/boot/dts/qcom/sm6150.dtsi | 36 ++++++++++++++++++++++++++++ >> 1 file changed, 36 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm6150.dtsi b/arch/arm64/boot/dts/qcom/sm6150.dtsi >> index 3d2a1cb02b62..ec244c47983e 100644 >> --- a/arch/arm64/boot/dts/qcom/sm6150.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm6150.dtsi >> @@ -16,6 +16,7 @@ >> #include >> #include >> #include >> +#include >> >> / { >> interrupt-parent = <&intc>; >> @@ -4246,6 +4247,41 @@ compute-cb@6 { >> dma-coherent; >> }; >> }; >> + >> + gpr: gpr { >> + compatible = "qcom,gpr"; >> + qcom,glink-channels = "adsp_apps"; >> + qcom,domain = ; >> + qcom,intents = <512 20>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + q6apm: service@1 { >> + compatible = "qcom,q6apm"; >> + reg = ; >> + #sound-dai-cells = <0>; >> + >> + q6apmbedai: bedais { >> + compatible = "qcom,q6apm-lpass-dais"; >> + #sound-dai-cells = <1>; >> + }; >> + >> + q6apmdai: dais { >> + compatible = "qcom,q6apm-dais"; >> + iommus = <&apps_smmu 0x1721 0x0>; > > I see that the documentation mentions a mask of 0x0 (like you did > here), but downstream does something funny here: > > iommus = <&apps_smmu 0x1721 0x0>; > qcom,smmu-sid-mask = /bits/ 64 <0xf>; > > with the latter value being consumed by the driver manually and when > it binds some sort of DMA_BUFs, the effective SID (ID & mask -- notice > there's no bitflipping of the mask part here unlike in the SMMU driver) > is prepended to the address: > > smmu->pa |= ((sid & mask) << 32); > > We can then check that the SMMU driver reads the SMR mask as a 16b field, > meaning the result is (sid & 0xffff) and not (sid & 0xf).. > > If we take the hardcoded-downstream mask and compare it with the HSR, > we can notice that all the streams in the 0x172X range correspond to > LPASS_ADSP, so perhaps it's a design choice that the DSP end only cares > about the least significant digit > > TLDR this seems to be all OK > > Konrad Thank you so much for the detailed explanation. -- Thx and BRs, Le Qi