Re: [Freedreno] [PATCH 5/8] drm/msm/dsi: stop setting clock parents manually

abhinavk
2021-06-21T22:10:57Z

On 2021-05-15 06:12, Dmitry Baryshkov wrote:
> There is no reason to set clock parents manually, use device tree to
> assign DSI/display clock parents to DSI PHY clocks. Dropping this
> manual
> setup allows us to drop repeating code and to move registration of hw
> clock providers to generic place.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Once you have documented or pointed me to the documentation that
assign-clock-parents
is now a mandatory property for the DSI node, this is a good cleanup,
hence:

Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>

> ---
> drivers/gpu/drm/msm/dsi/dsi.h | 2 --
> drivers/gpu/drm/msm/dsi/dsi_host.c | 51 ---------------------------
> drivers/gpu/drm/msm/dsi/dsi_manager.c | 5 ---
> drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 11 ------
> 4 files changed, 69 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi.h
> b/drivers/gpu/drm/msm/dsi/dsi.h
> index 7abfeab08165..2041980548f0 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi.h
> +++ b/drivers/gpu/drm/msm/dsi/dsi.h
> @@ -169,8 +169,6 @@ void msm_dsi_phy_get_shared_timings(struct
> msm_dsi_phy *phy,
> struct msm_dsi_phy_shared_timings *shared_timing);
> void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy,
> enum msm_dsi_phy_usecase uc);
> -int msm_dsi_phy_get_clk_provider(struct msm_dsi_phy *phy,
> - struct clk **byte_clk_provider, struct clk **pixel_clk_provider);
> void msm_dsi_phy_pll_save_state(struct msm_dsi_phy *phy);
> int msm_dsi_phy_pll_restore_state(struct msm_dsi_phy *phy);
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
> b/drivers/gpu/drm/msm/dsi/dsi_host.c
> index 8a10e4343281..1f444101e551 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
> @@ -2223,57 +2223,6 @@ void msm_dsi_host_cmd_xfer_commit(struct
> mipi_dsi_host *host, u32 dma_base,
> wmb();
> }
>
> -int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
> - struct msm_dsi_phy *src_phy)
> -{
> - struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
> - struct clk *byte_clk_provider, *pixel_clk_provider;
> - int ret;
> -
> - ret = msm_dsi_phy_get_clk_provider(src_phy,
> - &byte_clk_provider, &pixel_clk_provider);
> - if (ret) {
> - pr_info("%s: can't get provider from pll, don't set parent\n",
> - __func__);
> - return 0;
> - }
> -
> - ret = clk_set_parent(msm_host->byte_clk_src, byte_clk_provider);
> - if (ret) {
> - pr_err("%s: can't set parent to byte_clk_src. ret=%d\n",
> - __func__, ret);
> - goto exit;
> - }
> -
> - ret = clk_set_parent(msm_host->pixel_clk_src, pixel_clk_provider);
> - if (ret) {
> - pr_err("%s: can't set parent to pixel_clk_src. ret=%d\n",
> - __func__, ret);
> - goto exit;
> - }
> -
> - if (msm_host->dsi_clk_src) {
> - ret = clk_set_parent(msm_host->dsi_clk_src, pixel_clk_provider);
> - if (ret) {
> - pr_err("%s: can't set parent to dsi_clk_src. ret=%d\n",
> - __func__, ret);
> - goto exit;
> - }
> - }
> -
> - if (msm_host->esc_clk_src) {
> - ret = clk_set_parent(msm_host->esc_clk_src, byte_clk_provider);
> - if (ret) {
> - pr_err("%s: can't set parent to esc_clk_src. ret=%d\n",
> - __func__, ret);
> - goto exit;
> - }
> - }
> -
> -exit:
> - return ret;
> -}
> -
> void msm_dsi_host_reset_phy(struct mipi_dsi_host *host)
> {
> struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c
> b/drivers/gpu/drm/msm/dsi/dsi_manager.c
> index cd016576e8c5..12efc8c69046 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_manager.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c
> @@ -78,7 +78,6 @@ static int dsi_mgr_setup_components(int id)
> return ret;
>
> msm_dsi_phy_set_usecase(msm_dsi->phy, MSM_DSI_PHY_STANDALONE);
> - ret = msm_dsi_host_set_src_pll(msm_dsi->host, msm_dsi->phy);
> } else if (!other_dsi) {
> ret = 0;
> } else {
> @@ -105,10 +104,6 @@ static int dsi_mgr_setup_components(int id)
> MSM_DSI_PHY_MASTER);
> msm_dsi_phy_set_usecase(clk_slave_dsi->phy,
> MSM_DSI_PHY_SLAVE);
> - ret = msm_dsi_host_set_src_pll(msm_dsi->host, clk_master_dsi->phy);
> - if (ret)
> - return ret;
> - ret = msm_dsi_host_set_src_pll(other_dsi->host,
> clk_master_dsi->phy);
> }
>
> return ret;
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> index ff7f2ec42030..f2b5e0f63a16 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> @@ -835,17 +835,6 @@ void msm_dsi_phy_set_usecase(struct msm_dsi_phy
> *phy,
> phy->usecase = uc;
> }
>
> -int msm_dsi_phy_get_clk_provider(struct msm_dsi_phy *phy,
> - struct clk **byte_clk_provider, struct clk **pixel_clk_provider)
> -{
> - if (byte_clk_provider)
> - *byte_clk_provider =
> phy->provided_clocks->hws[DSI_BYTE_PLL_CLK]->clk;
> - if (pixel_clk_provider)
> - *pixel_clk_provider =
> phy->provided_clocks->hws[DSI_PIXEL_PLL_CLK]->clk;
> -
> - return 0;
> -}
> -
> void msm_dsi_phy_pll_save_state(struct msm_dsi_phy *phy)
> {
> if (phy->cfg->ops.save_pll_state) {