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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Qiang Yu <qiang.yu@oss.qualcomm.com>
Cc: Bjorn Andersson <andersson@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Brian Masney <bmasney@redhat.com>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Taniya Das <taniya.das@oss.qualcomm.com>,
	Konrad Dybcio <konradybcio@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	krishna.chundru@oss.qualcomm.com
Subject: Re: [PATCH v3 1/4] dt-bindings: clock: qcom: Add QREF regulator supplies for glymur
Date: Thu, 14 May 2026 12:35:19 +0200	[thread overview]
Message-ID: <e495cf7c-a76c-4ecc-aa95-36fb0ee54b80@kernel.org> (raw)
In-Reply-To: <20260514-outgoing-literate-dove-2e2a73@quoll>

On 14/05/2026 12:22, Krzysztof Kozlowski wrote:
> On Wed, May 06, 2026 at 01:43:51AM -0700, Qiang Yu wrote:
>> Add regulator supply properties for the Glymur TCSR QREF/REFGEN blocks
>> required by clkref clocks.
>>
>> The vdda-qreftx*, vdda-qrefrpt*, and vdda-qrefrx* supplies map to common
>> QREF TX/RPT/RX components, while SoC-specific topology and instance count
>> differ. Document them here for qcom,glymur-tcsr.
>>
>> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
>> ---
>>  .../bindings/clock/qcom,sm8550-tcsr.yaml           | 57 ++++++++++++++++++++++
>>  1 file changed, 57 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml
>> index 1ccdf4b0f5dd..57921cb63230 100644
>> --- a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml
>> +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml
>> @@ -51,6 +51,63 @@ properties:
>>    '#reset-cells':
>>      const: 1
>>  
>> +  vdda-refgen-0p9-supply: true
>> +  vdda-refgen-1p2-supply: true
>> +  vdda-qrefrx0-0p9-supply: true
>> +  vdda-qrefrx1-0p9-supply: true
>> +  vdda-qrefrx2-0p9-supply: true
>> +  vdda-qrefrx4-0p9-supply: true
>> +  vdda-qrefrx5-0p9-supply: true
>> +  vdda-qreftx0-0p9-supply: true
>> +  vdda-qreftx0-1p2-supply: true
>> +  vdda-qreftx1-0p9-supply: true
>> +  vdda-qrefrpt0-0p9-supply: true
>> +  vdda-qrefrpt1-0p9-supply: true
>> +  vdda-qrefrpt2-0p9-supply: true
>> +  vdda-qrefrpt3-0p9-supply: true
>> +  vdda-qrefrpt4-0p9-supply: true
> 
> Either I do not understand your previous explanation:
> CXO -> TX0 -> RPT0 -> RPT1 -> RPT2 -> RX2 -> PCIe4_PHY
> 
> or this is still wrong. There is no TCSR here, so this proves nothing.
> If TCSR is TX0, then you do not have five of them...
> 
> My previous comment stay - you are not describing the actual hardware
> here.

And it should not be my task BUT YOURS to verify this in hardware
programming guide or manual, but nevertheless I did verify and the
manual DOES NOT mention these supplies. For Glymur, it mentions 8 reset
ports and 5 clock ports.

No supplies at all.

Then I went to QREF and it does mention few supplies but completely
different, like mx, cx, px 0.88 and px1.2, so none of this matches QREF
either.

Best regards,
Krzysztof

  reply	other threads:[~2026-05-14 10:35 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-06  8:43 [PATCH v3 0/4] clk: qcom: Add common clkref support and migrate Glymur Qiang Yu
2026-05-06  8:43 ` [PATCH v3 1/4] dt-bindings: clock: qcom: Add QREF regulator supplies for glymur Qiang Yu
2026-05-14 10:22   ` Krzysztof Kozlowski
2026-05-14 10:35     ` Krzysztof Kozlowski [this message]
2026-05-06  8:43 ` [PATCH v3 2/4] clk: qcom: Add generic clkref_en support Qiang Yu
2026-05-06  8:43 ` [PATCH v3 3/4] clk: qcom: tcsrcc-glymur: Migrate tcsr_pcie_N_clkref_en to clk_ref common helper Qiang Yu
2026-05-06  8:43 ` [PATCH v3 4/4] arm64: dts: qcom: glymur: Add QREF regulator supplies to TCSR Qiang Yu

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