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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Cc: Rob Clark <robin.clark@oss.qualcomm.com>,
	Sean Paul <sean@poorly.run>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Dmitry Baryshkov <lumag@kernel.org>,
	Abhinav Kumar <abhinav.kumar@linux.dev>,
	Marijn Suijten <marijn.suijten@somainline.org>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Jessica Zhang <jesszhan0024@gmail.com>,
	Dan Carpenter <dan.carpenter@linaro.org>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org,
	Jie Zhang <jie.zhang@oss.qualcomm.com>
Subject: Re: [PATCH v2 3/6] dt-bindings: display/msm/rgmu: Document A612 RGMU
Date: Fri, 14 Nov 2025 13:16:04 +0100	[thread overview]
Message-ID: <e7e4b35f-8c8c-4a11-8d3a-193ba93bb6d8@kernel.org> (raw)
In-Reply-To: <e0e82b22-ecef-4136-834b-ea4a6b00e179@oss.qualcomm.com>

On 14/11/2025 13:08, Akhil P Oommen wrote:
> On 11/14/2025 5:30 PM, Akhil P Oommen wrote:
>> On 11/10/2025 1:21 PM, Krzysztof Kozlowski wrote:
>>> On Fri, Nov 07, 2025 at 02:20:08AM +0530, Akhil P Oommen wrote:
>>>> From: Jie Zhang <jie.zhang@oss.qualcomm.com>
>>>>
>>>> RGMU a.k.a Reduced Graphics Management Unit is a small state machine
>>>> with the sole purpose of providing IFPC (Inter Frame Power Collapse)
>>>> support. Compared to GMU, it doesn't manage GPU clock, voltage
>>>> scaling, bw voting or any other functionalities. All it does is detect
>>>> an idle GPU and toggle the GDSC switch. As it doesn't access DDR space,
>>>> it doesn't require iommu.
>>>>
>>>> So far, only Adreno 612 GPU has an RGMU core. Document RGMU in the GMU's
>>>> schema.
>>>>
>>>> Signed-off-by: Jie Zhang <jie.zhang@oss.qualcomm.com>
>>>> Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
>>>> ---
>>>>  .../devicetree/bindings/display/msm/rgmu.yaml      | 131 +++++++++++++++++++++
>>>>  MAINTAINERS                                        |   1 +
>>>>  2 files changed, 132 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/display/msm/rgmu.yaml b/Documentation/devicetree/bindings/display/msm/rgmu.yaml
>>>> new file mode 100644
>>>> index 000000000000..7621556477d0
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/display/msm/rgmu.yaml
>>>
>>> Filename matching compatible, so qcom,adreno-rgmu.yaml
>>>
>>>
>>>> @@ -0,0 +1,131 @@
>>>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>>>> +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
>>>> +%YAML 1.2
>>>> +---
>>>> +
>>>> +$id: http://devicetree.org/schemas/display/msm/rgmu.yaml#
>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>>> +
>>>> +title: RGMU attached to certain Adreno GPUs
>>>> +
>>>> +maintainers:
>>>> +  - Rob Clark <robin.clark@oss.qualcomm.com>
>>>> +
>>>> +description: |
>>>
>>> Do not need '|' unless you need to preserve formatting.
>>>
>>>> +  RGMU (Reduced Graphics Management Unit) IP is present in some GPUs that
>>>> +  belong to Adreno A6xx family. It is a small state machine that helps to
>>>> +  toggle the GX GDSC (connected to CX rail) to implement IFPC feature and save
>>>> +  power.
>>>> +
>>>> +properties:
>>>> +  compatible:
>>>> +    items:
>>>> +      - const: qcom,adreno-rgmu-612.0
>>>> +      - const: qcom,adreno-rgmu
>>>> +
>>>> +  reg:
>>>> +    items:
>>>> +      - description: Core RGMU registers
>>>> +
>>>> +  reg-names:
>>>> +    items:
>>>> +      - const: gmu
>>>
>>> Drop reg-names, useless for one entry with same name as the block name.
>>
>> Just to confirm, drop only reg-names, but keep 'reg'?
> 
> Wait. We should keep 'reg'.
> 
> If we remove 'reg-names' here, we cannot use reg-names in DT too because
> we are setting additionalProperties to False, right?


Yes, I ask to drop reg-names from everywhere because they are pointless.

Best regards,
Krzysztof

  reply	other threads:[~2025-11-14 12:16 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-06 20:50 [PATCH v2 0/6] Support for Adreno 612 GPU - Respin Akhil P Oommen
2025-11-06 20:50 ` [PATCH v2 1/6] drm/msm/a6xx: Add support for Adreno 612 Akhil P Oommen
2025-11-07  8:58   ` Konrad Dybcio
2025-11-11 15:10     ` Akhil P Oommen
2025-11-12  9:59       ` Konrad Dybcio
2025-11-06 20:50 ` [PATCH v2 2/6] dt-bindings: display/msm: gpu: Document A612 GPU Akhil P Oommen
2025-11-10  7:48   ` Krzysztof Kozlowski
2025-11-14 11:58     ` Akhil P Oommen
2025-11-06 20:50 ` [PATCH v2 3/6] dt-bindings: display/msm/rgmu: Document A612 RGMU Akhil P Oommen
2025-11-10  7:51   ` Krzysztof Kozlowski
2025-11-11 14:51     ` Akhil P Oommen
2025-11-13  8:11       ` Krzysztof Kozlowski
2025-11-14 12:00     ` Akhil P Oommen
2025-11-14 12:08       ` Akhil P Oommen
2025-11-14 12:16         ` Krzysztof Kozlowski [this message]
2025-11-06 20:50 ` [PATCH v2 4/6] arm64: dts: qcom: sm6150: add the GPU SMMU node Akhil P Oommen
2025-11-06 20:50 ` [PATCH v2 5/6] arm64: dts: qcom: sm6150: Add gpu and rgmu nodes Akhil P Oommen
2025-11-07  9:01   ` Konrad Dybcio
2025-11-10 10:42     ` Akhil P Oommen
2025-11-06 20:50 ` [PATCH v2 6/6] arm64: dts: qcom: qcs615-ride: Enable Adreno 612 GPU Akhil P Oommen
2025-11-07  8:52 ` [PATCH v2 0/6] Support for Adreno 612 GPU - Respin Konrad Dybcio
2025-11-10 10:46   ` Akhil P Oommen
2025-11-10 14:34 ` Rob Herring (Arm)

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