From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Tao Zhang <quic_taozha@quicinc.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Konrad Dybcio <konradybcio@gmail.com>,
Mike Leach <mike.leach@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Jinlong Mao <quic_jinlmao@quicinc.com>,
Leo Yan <leo.yan@linaro.org>,
coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Tingwei Zhang <quic_tingweiz@quicinc.com>,
Yuanfang Zhang <quic_yuanfang@quicinc.com>,
Trilok Soni <quic_tsoni@quicinc.com>,
Hao Zhang <quic_hazha@quicinc.com>,
linux-arm-msm@vger.kernel.org, andersson@kernel.org
Subject: Re: [PATCH v6 09/13] Add nodes for dsb edge control
Date: Tue, 20 Jun 2023 14:41:08 +0100 [thread overview]
Message-ID: <e82385f1-de55-4c70-5c5c-35b93a5b2488@arm.com> (raw)
In-Reply-To: <3aca4a55-0dc7-b34c-d2c0-111a96c33ec3@quicinc.com>
On 20/06/2023 09:31, Tao Zhang wrote:
>
> On 6/20/2023 3:37 PM, Greg Kroah-Hartman wrote:
>> On Tue, Jun 20, 2023 at 03:32:37PM +0800, Tao Zhang wrote:
>>> Add the nodes to set value for DSB edge control and DSB edge
>>> control mask. Each DSB subunit TPDM has maximum of n(n<16) EDCR
>>> resgisters to configure edge control. DSB edge detection control
>>> 00: Rising edge detection
>>> 01: Falling edge detection
>>> 10: Rising and falling edge detection (toggle detection)
>>> And each DSB subunit TPDM has maximum of m(m<8) ECDMR registers to
>>> configure mask. Eight 32 bit registers providing DSB interface
>>> edge detection mask control.
>>>
>>> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
>>> ---
>>> .../ABI/testing/sysfs-bus-coresight-devices-tpdm | 32 +++++
>>> drivers/hwtracing/coresight/coresight-tpdm.c | 143
>>> ++++++++++++++++++++-
>>> drivers/hwtracing/coresight/coresight-tpdm.h | 22 ++++
>>> 3 files changed, 196 insertions(+), 1 deletion(-)
>>>
>>> diff --git
>>> a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
>>> b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
>>> index 2a82cd0..34189e4a 100644
>>> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
>>> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
>>> @@ -60,3 +60,35 @@ Description:
>>> Bit[3] : Set to 0 for low performance mode.
>>> Set to 1 for high performance mode.
>>> Bit[4:8] : Select byte lane for high performance mode.
>>> +
>>> +What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge_ctrl
>>> +Date: March 2023
>>> +KernelVersion 6.5
>>> +Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang
>>> (QUIC) <quic_taozha@quicinc.com>
>>> +Description:
>>> + Read/Write a set of the edge control registers of the DSB
>>> + in TPDM.
>>> +
>>> + Expected format is the following:
>>> + <integer1> <integer2> <integer3>
>> sysfs is "one value", not 3. Please never have to parse a sysfs file.
>
> Do you mean sysfs file can only accept "one value"?
>
> I see that more than one value are written to the sysfs file
> "trigout_attach".
>
>>
>>> +static ssize_t dsb_edge_ctrl_show(struct device *dev,
>>> + struct device_attribute *attr,
>>> + char *buf)
>>> +{
>>> + struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
>>> + ssize_t size = 0;
>>> + unsigned long bytes;
>>> + int i;
>>> +
>>> + spin_lock(&drvdata->spinlock);
>>> + for (i = 0; i < TPDM_DSB_MAX_EDCR; i++) {
>>> + bytes = sysfs_emit_at(buf, size,
>>> + "Index:0x%x Val:0x%x\n", i,
>> Again, no, one value, no "string" needed to parse anything.
>
> I also see other sysfs files can be read more than one value in other
> drivers.
>
> Is this "one value" limitation the usage rule of Linux sysfs system?
>
> Or am I misunderstanding what you mean?
Please fix the other sysfs tunables in the following patches.
Kind regards
Suzuki
next prev parent reply other threads:[~2023-06-20 13:41 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-20 7:32 [PATCH v6 00/13] Add support to configure TPDM DSB subunit Tao Zhang
2023-06-20 7:32 ` [PATCH v6 01/13] coresight-tpdm: Remove the unnecessary lock Tao Zhang
2023-06-20 7:32 ` [PATCH v6 02/13] dt-bindings: arm: Add support for DSB element size Tao Zhang
2023-06-22 1:47 ` Rob Herring
2023-06-20 7:32 ` [PATCH v6 03/13] coresight-tpdm: Introduce TPDM subtype to TPDM driver Tao Zhang
2023-06-20 7:32 ` [PATCH v6 04/13] coresight-tpda: Add DSB dataset support Tao Zhang
2023-06-20 7:32 ` [PATCH v6 05/13] coresight-tpdm: Initialize DSB subunit configuration Tao Zhang
2023-06-20 7:32 ` [PATCH v6 06/13] coresight-tpdm: Add reset node to TPDM node Tao Zhang
2023-06-20 7:32 ` [PATCH v6 07/13] coresight-tpdm: Add nodes to set trigger timestamp and type Tao Zhang
2023-06-20 7:32 ` [PATCH v6 08/13] coresight-tpdm: Add node to set dsb programming mode Tao Zhang
2023-06-20 7:32 ` [PATCH v6 09/13] Add nodes for dsb edge control Tao Zhang
2023-06-20 7:36 ` Greg Kroah-Hartman
2023-06-20 7:37 ` Greg Kroah-Hartman
2023-06-20 8:31 ` Tao Zhang
2023-06-20 8:49 ` Greg Kroah-Hartman
[not found] ` <23eae515-4262-d5b8-4629-ade11362d4a8@quicinc.com>
2023-06-28 6:13 ` Greg Kroah-Hartman
2023-06-20 13:41 ` Suzuki K Poulose [this message]
2023-07-12 13:53 ` Tao Zhang
2023-07-13 8:54 ` Mike Leach
2023-07-13 9:34 ` Suzuki K Poulose
2023-07-13 16:13 ` Tao Zhang
2023-07-13 16:37 ` Suzuki K Poulose
2023-07-14 5:50 ` Tao Zhang
2023-07-14 10:24 ` Suzuki K Poulose
2023-07-14 14:39 ` Tao Zhang
2023-06-20 7:32 ` [PATCH v6 10/13] coresight-tpdm: Add nodes to configure pattern match output Tao Zhang
2023-06-20 7:32 ` [PATCH v6 11/13] coresight-tpdm: Add nodes for timestamp request Tao Zhang
2023-06-20 7:32 ` [PATCH v6 12/13] dt-bindings: arm: Add support for DSB MSR register Tao Zhang
2023-06-22 1:47 ` Rob Herring
2023-06-20 7:32 ` [PATCH v6 13/13] coresight-tpdm: Add nodes for dsb msr support Tao Zhang
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