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Thu, 05 Feb 2026 01:10:47 -0800 (PST) X-Received: by 2002:a05:6a20:2452:b0:352:7cc0:93b7 with SMTP id adf61e73a8af0-39372427748mr6441279637.40.1770282646413; Thu, 05 Feb 2026 01:10:46 -0800 (PST) Received: from [10.206.109.90] ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c6c85729e2dsm4097610a12.34.2026.02.05.01.10.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 05 Feb 2026 01:10:45 -0800 (PST) Message-ID: Date: Thu, 5 Feb 2026 14:40:39 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v3 2/7] media: iris: introduce SM8350 and SC8280XP support Content-Language: en-US To: Dmitry Baryshkov Cc: Vikash Garodia , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Abhinav Kumar , Bjorn Andersson , David Heidelberg , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Johan Hovold References: <20260125-iris-sc8280xp-v3-0-d21861a9ea33@oss.qualcomm.com> <20260125-iris-sc8280xp-v3-2-d21861a9ea33@oss.qualcomm.com> <8c5cd9ff-e549-00ab-60c6-814b52f50949@oss.qualcomm.com> From: Dikshita Agarwal In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=bMgb4f+Z c=1 sm=1 tr=0 ts=69845e98 cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=SfZIM4WqlS33aqDva-YA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-ORIG-GUID: sDNsSItpJp6p7FokpG02KnKEedGKkn4R X-Proofpoint-GUID: sDNsSItpJp6p7FokpG02KnKEedGKkn4R X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjA1MDA2NSBTYWx0ZWRfX/RbVzfDEPM6s 60jrF4qkcRvR2+01IMWvI4UUj4uK2tpJOAWRWXvhubSy0bTIFI02R+O0nwTjvV4PkxON14qfsRs ej1U1GE+XQgimoYp1Jm7BjMcvYynDdlFzftvznsf1nG3nweusQwjTJDrG/K76sQ7FAeB9TY/+b3 OBSpU+Vni3fyNPpMhWEpauh23EJ1U3o28wuEvqZ5u6+xiEZLglQC8titDU6Yzc6lwNQ/Rbmnayi 0Pd6U03l2IL/7MV6x1Ir5PAtJVPvR5m6MkjCARM0PVP89ilcSc9pA39UKLVZjrDW/zHJo2fLxMi gJWsejlhpcbnWuxfFOf3NQNU8B6CYztTADwR4mXP7o4t7yBc2yqX6uRVRvH6pJoxzu60XEwdIaA 6/ve6Ec7D7tyK+B9GY09KjHv3JlyCON2cNaM3AXeQbg58dh4jhFP8/H+XJFy3Dw/RbY8KD1YT54 F7r+Ot47t8HvfiliAxQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-05_01,2026-02-05_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 bulkscore=0 malwarescore=0 suspectscore=0 adultscore=0 lowpriorityscore=0 spamscore=0 phishscore=0 clxscore=1015 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602050065 On 1/31/2026 12:58 PM, Dmitry Baryshkov wrote: > On Fri, Jan 30, 2026 at 06:46:04PM +0530, Dikshita Agarwal wrote: >> >> >> On 1/25/2026 9:02 PM, Dmitry Baryshkov wrote: >>> SM8350 and SC8280XP have an updated version of the Iris2 core also >>> present on the SM8250 and SC7280 platforms. Add necessary platform data >>> to utilize the core on those two platforms. >>> >>> The iris_platform_gen1.c is now compiled unconditionally, even if Venus >>> driver is enabled, but SM8250 and SC7280 are still disabled in >>> iris_dt_match. >>> >>> Signed-off-by: Dmitry Baryshkov >>> --- >>> drivers/media/platform/qcom/iris/Makefile | 5 +- >>> .../platform/qcom/iris/iris_platform_common.h | 2 + >>> .../media/platform/qcom/iris/iris_platform_gen1.c | 111 +++++++++++++++++++++ >>> .../platform/qcom/iris/iris_platform_sm8350.h | 20 ++++ >>> drivers/media/platform/qcom/iris/iris_probe.c | 10 ++ >>> 5 files changed, 144 insertions(+), 4 deletions(-) >>> >>> diff --git a/drivers/media/platform/qcom/iris/Makefile b/drivers/media/platform/qcom/iris/Makefile >>> index 2abbd3aeb4af..2fde45f81727 100644 >>> --- a/drivers/media/platform/qcom/iris/Makefile >>> +++ b/drivers/media/platform/qcom/iris/Makefile >>> @@ -10,6 +10,7 @@ qcom-iris-objs += iris_buffer.o \ >>> iris_hfi_gen2_packet.o \ >>> iris_hfi_gen2_response.o \ >>> iris_hfi_queue.o \ >>> + iris_platform_gen1.o \ >>> iris_platform_gen2.o \ >>> iris_power.o \ >>> iris_probe.o \ >>> @@ -26,8 +27,4 @@ qcom-iris-objs += iris_buffer.o \ >>> iris_vpu_buffer.o \ >>> iris_vpu_common.o \ >>> >>> -ifeq ($(CONFIG_VIDEO_QCOM_VENUS),) >>> -qcom-iris-objs += iris_platform_gen1.o >>> -endif >>> - >>> obj-$(CONFIG_VIDEO_QCOM_IRIS) += qcom-iris.o >> >> This change is not needed in this patch, pls remove. > > It is necessary in this patch. We enable gen1 platforms which are not a > part of the venus->iris transition (they have never been supported by > the venus driver). As such, iris_platform_gen1.c now needs to be > compiled unconditionally. > Ack, I assumed you have this series dependent on the other series "flip the switch between Venus and Iris drivers" which has this change already so won't be needed here. >> >>> diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h >>> index 5a489917580e..49dba0f50988 100644 >>> --- a/drivers/media/platform/qcom/iris/iris_platform_common.h >>> +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h >>> @@ -43,7 +43,9 @@ enum pipe_type { >>> >>> extern const struct iris_platform_data qcs8300_data; >>> extern const struct iris_platform_data sc7280_data; >>> +extern const struct iris_platform_data sc8280xp_data; >>> extern const struct iris_platform_data sm8250_data; >>> +extern const struct iris_platform_data sm8350_data; >>> extern const struct iris_platform_data sm8550_data; >>> extern const struct iris_platform_data sm8650_data; >>> extern const struct iris_platform_data sm8750_data; >>> diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen1.c b/drivers/media/platform/qcom/iris/iris_platform_gen1.c >>> index df8e6bf9430e..c99ff4d4644d 100644 >>> --- a/drivers/media/platform/qcom/iris/iris_platform_gen1.c >>> +++ b/drivers/media/platform/qcom/iris/iris_platform_gen1.c >>> @@ -14,6 +14,7 @@ >>> #include "iris_instance.h" >>> >>> #include "iris_platform_sc7280.h" >>> +#include "iris_platform_sm8350.h" >>> >>> #define BITRATE_MIN 32000 >>> #define BITRATE_MAX 160000000 >>> @@ -392,6 +393,61 @@ const struct iris_platform_data sm8250_data = { >>> .enc_ip_int_buf_tbl_size = ARRAY_SIZE(sm8250_enc_ip_int_buf_tbl), >>> }; >>> >>> +const struct iris_platform_data sm8350_data = { >>> + .get_instance = iris_hfi_gen1_get_instance, >>> + .init_hfi_command_ops = &iris_hfi_gen1_command_ops_init, >>> + .init_hfi_response_ops = iris_hfi_gen1_response_ops_init, >>> + .get_vpu_buffer_size = iris_vpu_buf_size, >>> + .vpu_ops = &iris_vpu2_ops, >>> + .set_preset_registers = iris_set_sm8350_preset_registers, >>> + .icc_tbl = sm8250_icc_table, >>> + .icc_tbl_size = ARRAY_SIZE(sm8250_icc_table), >>> + .clk_rst_tbl = sm8350_clk_reset_table, >>> + .clk_rst_tbl_size = ARRAY_SIZE(sm8350_clk_reset_table), >>> + .bw_tbl_dec = sm8250_bw_table_dec, >>> + .bw_tbl_dec_size = ARRAY_SIZE(sm8250_bw_table_dec), >>> + .pmdomain_tbl = sm8250_pmdomain_table, >>> + .pmdomain_tbl_size = ARRAY_SIZE(sm8250_pmdomain_table), >>> + .opp_pd_tbl = sm8250_opp_pd_table, >>> + .opp_pd_tbl_size = ARRAY_SIZE(sm8250_opp_pd_table), >>> + .clk_tbl = sm8250_clk_table, >>> + .clk_tbl_size = ARRAY_SIZE(sm8250_clk_table), >>> + .opp_clk_tbl = sm8250_opp_clk_table, >>> + /* Upper bound of DMA address range */ >>> + .dma_mask = 0xe0000000 - 1, >>> + .fwname = "qcom/vpu/vpu20_p4.mbn", >> >> This firmware is not compatible with SM8350. >> SM8350 firmware is not released to linux-firmware yet. > > What would be the name for the firmware? The downstream uses vpu20_4v > here, so, I guess, in upstream we should be using vpu20_p4, but a newer > version? > Using a newer version won't work as the firmware for SM8250 and SM8350 are different binaries generated from different firmware source branch. You can give it a try, but AFAIK it won't work. >> >>> + .pas_id = IRIS_PAS_ID, >>> + .inst_iris_fmts = platform_fmts_sm8250_dec, >>> + .inst_iris_fmts_size = ARRAY_SIZE(platform_fmts_sm8250_dec), >>> + .inst_caps = &platform_inst_cap_sm8250, >>> + .inst_fw_caps_dec = inst_fw_cap_sm8250_dec, >>> + .inst_fw_caps_dec_size = ARRAY_SIZE(inst_fw_cap_sm8250_dec), >>> + .inst_fw_caps_enc = inst_fw_cap_sm8250_enc, >>> + .inst_fw_caps_enc_size = ARRAY_SIZE(inst_fw_cap_sm8250_enc), >>> + .tz_cp_config_data = tz_cp_config_sm8250, >>> + .tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_sm8250), >>> + .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE, >>> + .num_vpp_pipe = 4, >>> + .max_session_count = 16, >>> + .max_core_mbpf = NUM_MBS_8K, >>> + .max_core_mbps = ((7680 * 4320) / 256) * 60, >>> + .dec_input_config_params_default = >>> + sm8250_vdec_input_config_param_default, >>> + .dec_input_config_params_default_size = >>> + ARRAY_SIZE(sm8250_vdec_input_config_param_default), >>> + .enc_input_config_params = sm8250_venc_input_config_param, >>> + .enc_input_config_params_size = >>> + ARRAY_SIZE(sm8250_venc_input_config_param), >>> + >>> + .dec_ip_int_buf_tbl = sm8250_dec_ip_int_buf_tbl, >>> + .dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8250_dec_ip_int_buf_tbl), >>> + .dec_op_int_buf_tbl = sm8250_dec_op_int_buf_tbl, >>> + .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8250_dec_op_int_buf_tbl), >>> + >>> + .enc_ip_int_buf_tbl = sm8250_enc_ip_int_buf_tbl, >>> + .enc_ip_int_buf_tbl_size = ARRAY_SIZE(sm8250_enc_ip_int_buf_tbl), >>> +}; >>> + >>> const struct iris_platform_data sc7280_data = { >>> .get_instance = iris_hfi_gen1_get_instance, >>> .init_hfi_command_ops = &iris_hfi_gen1_command_ops_init, >>> @@ -446,3 +502,58 @@ const struct iris_platform_data sc7280_data = { >>> .enc_ip_int_buf_tbl = sm8250_enc_ip_int_buf_tbl, >>> .enc_ip_int_buf_tbl_size = ARRAY_SIZE(sm8250_enc_ip_int_buf_tbl), >>> }; >>> + >>> +const struct iris_platform_data sc8280xp_data = { >>> + .get_instance = iris_hfi_gen1_get_instance, >>> + .init_hfi_command_ops = &iris_hfi_gen1_command_ops_init, >>> + .init_hfi_response_ops = iris_hfi_gen1_response_ops_init, >>> + .get_vpu_buffer_size = iris_vpu_buf_size, >>> + .vpu_ops = &iris_vpu2_ops, >>> + .set_preset_registers = iris_set_sm8350_preset_registers, >>> + .icc_tbl = sm8250_icc_table, >>> + .icc_tbl_size = ARRAY_SIZE(sm8250_icc_table), >>> + .clk_rst_tbl = sm8350_clk_reset_table, >>> + .clk_rst_tbl_size = ARRAY_SIZE(sm8350_clk_reset_table), >>> + .bw_tbl_dec = sm8250_bw_table_dec, >>> + .bw_tbl_dec_size = ARRAY_SIZE(sm8250_bw_table_dec), >>> + .pmdomain_tbl = sm8250_pmdomain_table, >>> + .pmdomain_tbl_size = ARRAY_SIZE(sm8250_pmdomain_table), >>> + .opp_pd_tbl = sm8250_opp_pd_table, >>> + .opp_pd_tbl_size = ARRAY_SIZE(sm8250_opp_pd_table), >>> + .clk_tbl = sm8250_clk_table, >>> + .clk_tbl_size = ARRAY_SIZE(sm8250_clk_table), >>> + .opp_clk_tbl = sm8250_opp_clk_table, >>> + /* Upper bound of DMA address range */ >>> + .dma_mask = 0xe0000000 - 1, >>> + .fwname = "qcom/vpu/vpu20_p2.mbn", >> >> this firmware doesn't exist on linux-firmware. > > It was based on the assumption of having 2 pipes. If Iris here has 2 > pipes, then probably we should still point to vpu20_p4.mbn? > SC8280XP also uses the Iris2 4‑pipe configuration, though its firmware comes from a different source branch compared to SM8250 and SM8350. This means we have multiple firmwares with identical VPU and pipe configurations but different origins. Could you propose a suitable naming scheme that can differentiate such firmware? >> >>> + .pas_id = IRIS_PAS_ID, >>> + .inst_iris_fmts = platform_fmts_sm8250_dec, >>> + .inst_iris_fmts_size = ARRAY_SIZE(platform_fmts_sm8250_dec), >>> + .inst_caps = &platform_inst_cap_sm8250, >>> + .inst_fw_caps_dec = inst_fw_cap_sm8250_dec, >>> + .inst_fw_caps_dec_size = ARRAY_SIZE(inst_fw_cap_sm8250_dec), >>> + .inst_fw_caps_enc = inst_fw_cap_sm8250_enc, >>> + .inst_fw_caps_enc_size = ARRAY_SIZE(inst_fw_cap_sm8250_enc), >>> + .tz_cp_config_data = tz_cp_config_sm8250, >>> + .tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_sm8250), >>> + .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE, >>> + .num_vpp_pipe = 2, >> >> sc8280xp is IRIS2 4 Pipe. > > Ack > >> >>> + .max_session_count = 16, >>> + .max_core_mbpf = NUM_MBS_8K, >>> + .max_core_mbps = ((7680 * 4320) / 256) * 60, >>> + .dec_input_config_params_default = >>> + sm8250_vdec_input_config_param_default, >>> + .dec_input_config_params_default_size = >>> + ARRAY_SIZE(sm8250_vdec_input_config_param_default), >>> + .enc_input_config_params = sm8250_venc_input_config_param, >>> + .enc_input_config_params_size = >>> + ARRAY_SIZE(sm8250_venc_input_config_param), >>> + >>> + .dec_ip_int_buf_tbl = sm8250_dec_ip_int_buf_tbl, >>> + .dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8250_dec_ip_int_buf_tbl), >>> + .dec_op_int_buf_tbl = sm8250_dec_op_int_buf_tbl, >>> + .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8250_dec_op_int_buf_tbl), >>> + >>> + .enc_ip_int_buf_tbl = sm8250_enc_ip_int_buf_tbl, >>> + .enc_ip_int_buf_tbl_size = ARRAY_SIZE(sm8250_enc_ip_int_buf_tbl), >>> +}; >>> diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8350.h b/drivers/media/platform/qcom/iris/iris_platform_sm8350.h >>> new file mode 100644 >>> index 000000000000..74cf5ea2359a >>> --- /dev/null >>> +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8350.h >>> @@ -0,0 +1,20 @@ >>> +/* SPDX-License-Identifier: GPL-2.0-only */ >>> +/* >>> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. >>> + */ >>> + >>> +#ifndef __IRIS_PLATFORM_SM8350_H__ >>> +#define __IRIS_PLATFORM_SM8350_H__ >>> + >>> +static void iris_set_sm8350_preset_registers(struct iris_core *core) >>> +{ >>> + u32 val; >>> + >>> + val = readl(core->reg_base + 0xb0088); >>> + val &= ~0x11; >>> + writel(val, core->reg_base + 0xb0088); >>> +} >> >> you can reuse this from SM8250. That would work. > > Hmm, downstream driver was explicit about clearing only these two bits. > Is it really fine to clear all the bits? > Yes it is. We are doing the same for other SOCs as well. Thanks, Dikshita >> >> Thanks, >> Dikshita >> >>> + >>> +static const char * const sm8350_clk_reset_table[] = { "core" }; >>> + >>> +#endif >